Lines Matching refs:mclk
389 RV7XX_SMC_MCLK_VALUE *mclk)
474 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
475 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
476 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
477 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
478 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
479 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
480 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
593 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk,
604 if (mclk <= pi->mvdd_split_frequency) {
643 if (pl->mclk <= pi->mclk_strobe_mode_threshold)
645 rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;
649 if (pl->mclk > pi->mclk_edc_enable_threshold)
655 pl->mclk, &level->mclk);
658 pl->mclk, &level->mclk);
661 pl->mclk, &level->mclk);
670 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
755 state->high.mclk);
983 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
984 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
985 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
986 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
988 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
989 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
991 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;
1032 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1034 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1036 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1038 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1040 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1042 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1045 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1047 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1050 table->initialState.levels[0].mclk.mclk770.mclk_value =
1051 cpu_to_be32(initial_state->low.mclk);
1094 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold)
1096 rv740_get_mclk_frequency_ratio(initial_state->low.mclk) | 0x10;
1100 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold)
1758 if (current_state->high.mclk <= pi->mclk_odt_threshold)
1761 if (new_state->high.mclk <= pi->mclk_odt_threshold)
1787 if (current_state->high.mclk <= pi->mclk_odt_threshold)
1790 if (new_state->high.mclk <= pi->mclk_odt_threshold)
2182 u32 sclk, mclk;
2201 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow);
2202 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16;
2210 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow);
2211 mclk |= clock_info->r600.ucMemoryClockHigh << 16;
2217 pl->mclk = mclk;
2253 pl->mclk = rdev->clock.default_mclk;
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
2445 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2446 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2448 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2449 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2451 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2452 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2455 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u\n",
2456 pl->sclk, pl->mclk, pl->vddc);
2458 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u\n",
2459 pl->sclk, pl->mclk, pl->vddc);
2461 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u\n",
2462 pl->sclk, pl->mclk, pl->vddc);
2488 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
2489 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2491 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n",
2492 current_index, pl->sclk, pl->mclk, pl->vddc);
2537 return pl->mclk;
2567 return requested_state->low.mclk;
2569 return requested_state->high.mclk;
2578 /* mclk switching doesn't seem to work reliably on desktop RV770s */
2581 switch_limit = 0xffffffff; /* disable mclk switching */