Lines Matching defs:rdev
119 int rv740_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock,
122 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
130 u32 reference_clock = rdev->clock.spll.reference_freq;
135 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
161 if (radeon_atombios_get_asic_ss_info(rdev, &ss,
185 int rv740_populate_mclk_value(struct radeon_device *rdev,
189 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
203 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM,
208 ibias = rv770_map_clkf_to_ibias(rdev, dividers.whole_fb_div);
248 if (radeon_atombios_get_asic_ss_info(rdev, &ss,
250 u32 reference_clock = rdev->clock.mpll.reference_freq;
287 void rv740_read_clock_registers(struct radeon_device *rdev)
289 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
317 int rv740_populate_smc_acpi_state(struct radeon_device *rdev,
320 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
336 rv770_populate_vddc_value(rdev, pi->acpi_vddc,
344 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table,
394 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
399 void rv740_enable_mclk_spread_spectrum(struct radeon_device *rdev,