Lines Matching defs:rdev
52 * @rdev: radeon_device pointer
56 int radeon_vce_init(struct radeon_device *rdev)
65 INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);
67 switch (rdev->family) {
87 r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev);
89 dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n",
96 size = rdev->vce_fw->size - strlen(fw_version) - 9;
97 c = rdev->vce_fw->data;
111 size = rdev->vce_fw->size - strlen(fb_version) - 3;
112 c = rdev->vce_fw->data;
121 if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)
125 start, mid, end, rdev->vce.fb_version);
127 rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);
130 if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) &&
131 (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) &&
132 (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8))))
137 if (rdev->family < CHIP_BONAIRE)
138 size = vce_v1_0_bo_size(rdev);
140 size = vce_v2_0_bo_size(rdev);
141 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
143 &rdev->vce.vcpu_bo);
145 dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
149 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
151 radeon_bo_unref(&rdev->vce.vcpu_bo);
152 dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
156 r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
157 &rdev->vce.gpu_addr);
158 radeon_bo_unreserve(rdev->vce.vcpu_bo);
160 radeon_bo_unref(&rdev->vce.vcpu_bo);
161 dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
166 atomic_set(&rdev->vce.handles[i], 0);
167 rdev->vce.filp[i] = NULL;
176 * @rdev: radeon_device pointer
180 void radeon_vce_fini(struct radeon_device *rdev)
182 if (rdev->vce.vcpu_bo == NULL)
185 radeon_bo_unref(&rdev->vce.vcpu_bo);
187 release_firmware(rdev->vce_fw);
193 * @rdev: radeon_device pointer
196 int radeon_vce_suspend(struct radeon_device *rdev)
200 if (rdev->vce.vcpu_bo == NULL)
204 if (atomic_read(&rdev->vce.handles[i]))
217 * @rdev: radeon_device pointer
220 int radeon_vce_resume(struct radeon_device *rdev)
225 if (rdev->vce.vcpu_bo == NULL)
228 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
230 dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
234 r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);
236 radeon_bo_unreserve(rdev->vce.vcpu_bo);
237 dev_err(rdev->dev, "(%d) VCE map failed\n", r);
241 memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo));
242 if (rdev->family < CHIP_BONAIRE)
243 r = vce_v1_0_load_fw(rdev, cpu_addr);
245 memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
247 radeon_bo_kunmap(rdev->vce.vcpu_bo);
249 radeon_bo_unreserve(rdev->vce.vcpu_bo);
263 struct radeon_device *rdev =
266 if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) &&
267 (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) {
268 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
269 radeon_dpm_enable_vce(rdev, false);
271 radeon_set_vce_clocks(rdev, 0, 0);
274 schedule_delayed_work(&rdev->vce.idle_work,
282 * @rdev: radeon_device pointer
286 void radeon_vce_note_usage(struct radeon_device *rdev)
289 bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);
290 set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,
293 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
299 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
300 radeon_dpm_enable_vce(rdev, true);
302 radeon_set_vce_clocks(rdev, 53300, 40000);
310 * @rdev: radeon_device pointer
315 void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
319 uint32_t handle = atomic_read(&rdev->vce.handles[i]);
320 if (!handle || rdev->vce.filp[i] != filp)
323 radeon_vce_note_usage(rdev);
325 r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
330 rdev->vce.filp[i] = NULL;
331 atomic_set(&rdev->vce.handles[i], 0);
338 * @rdev: radeon_device pointer
345 int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
353 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
389 r = radeon_ib_schedule(rdev, &ib, NULL, false);
397 radeon_ib_free(rdev, &ib);
405 * @rdev: radeon_device pointer
412 int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
420 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
446 r = radeon_ib_schedule(rdev, &ib, NULL, false);
454 radeon_ib_free(rdev, &ib);
527 if (atomic_read(&p->rdev->vce.handles[i]) == handle) {
528 if (p->rdev->vce.filp[i] != p->filp) {
538 if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
539 p->rdev->vce.filp[i] = p->filp;
540 p->rdev->vce.img_size[i] = 0;
587 size = &p->rdev->vce.img_size[session_idx];
679 atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
688 * @rdev: radeon_device pointer
694 bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
714 * @rdev: radeon_device pointer
718 void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
720 struct radeon_ring *ring = &rdev->ring[ib->ring];
730 * @rdev: radeon_device pointer
734 void radeon_vce_fence_emit(struct radeon_device *rdev,
737 struct radeon_ring *ring = &rdev->ring[fence->ring];
738 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
751 * @rdev: radeon_device pointer
755 int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
757 uint32_t rptr = vce_v1_0_get_rptr(rdev, ring);
761 r = radeon_ring_lock(rdev, ring, 16);
768 radeon_ring_unlock_commit(rdev, ring, false);
770 for (i = 0; i < rdev->usec_timeout; i++) {
771 if (vce_v1_0_get_rptr(rdev, ring) != rptr)
776 if (i < rdev->usec_timeout) {
791 * @rdev: radeon_device pointer
795 int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
800 r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL);
806 r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);