Lines Matching refs:tbo
52 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
56 bo = container_of(tbo, struct radeon_bo, tbo);
63 if (bo->tbo.base.import_attach)
64 drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg);
65 drm_gem_object_release(&bo->tbo.base);
155 drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size);
205 r = ttm_bo_init_validate(&rdev->mman.bdev, &bo->tbo, type,
224 r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_KERNEL,
235 r = ttm_bo_kmap(&bo->tbo, 0, PFN_UP(bo->tbo.base.size), &bo->kmap);
261 ttm_bo_get(&bo->tbo);
267 struct ttm_buffer_object *tbo;
271 tbo = &((*bo)->tbo);
272 ttm_bo_put(tbo);
282 if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm))
285 if (bo->tbo.pin_count) {
286 ttm_bo_pin(&bo->tbo);
320 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
322 ttm_bo_pin(&bo->tbo);
342 ttm_bo_unpin(&bo->tbo);
343 if (!bo->tbo.pin_count) {
344 if (bo->tbo.resource->mem_type == TTM_PL_VRAM)
380 &bo->tbo.base, bo, (unsigned long)bo->tbo.base.size,
381 *((unsigned long *)&bo->tbo.base.refcount));
386 drm_gem_object_put(&bo->tbo.base);
489 if (!bo->tbo.pin_count) {
493 radeon_mem_type_to_domain(bo->tbo.resource->mem_type);
516 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
550 dma_resv_assert_held(bo->tbo.base.resv);
568 if (old_object->tbo.pin_count == 0)
581 ttm_bo_unmap_virtual(&old_object->tbo);
591 bo->tbo.resource->start << PAGE_SHIFT,
592 bo->tbo.base.size);
675 dma_resv_assert_held(bo->tbo.base.resv);
687 dma_resv_assert_held(bo->tbo.base.resv);
697 if (bo->tbo.resource->mem_type != TTM_PL_VRAM) {
719 rbo = container_of(bo, struct radeon_bo, tbo);
734 rbo = container_of(bo, struct radeon_bo, tbo);
746 if (rbo->tbo.pin_count > 0)
789 struct dma_resv *resv = bo->tbo.base.resv;