Lines Matching defs:mode
1787 struct drm_display_mode *mode)
1807 mode->crtc_htotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total);
1808 mode->crtc_hdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp);
1809 mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart);
1810 mode->crtc_hsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart) +
1813 mode->crtc_vtotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total);
1814 mode->crtc_vdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp);
1815 mode->crtc_vsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart);
1816 mode->crtc_vsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart) +
1819 mode->flags = 0;
1822 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1824 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1826 mode->flags |= DRM_MODE_FLAG_CSYNC;
1828 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1830 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1832 mode->crtc_clock = mode->clock =
1837 mode->crtc_htotal -= 1;
1838 mode->crtc_vtotal -= 1;
1847 mode->crtc_htotal = le16_to_cpu(dtd_timings->usHActive) +
1849 mode->crtc_hdisplay = le16_to_cpu(dtd_timings->usHActive);
1850 mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) +
1852 mode->crtc_hsync_end = mode->crtc_hsync_start +
1855 mode->crtc_vtotal = le16_to_cpu(dtd_timings->usVActive) +
1857 mode->crtc_vdisplay = le16_to_cpu(dtd_timings->usVActive);
1858 mode->crtc_vsync_start = le16_to_cpu(dtd_timings->usVActive) +
1860 mode->crtc_vsync_end = mode->crtc_vsync_start +
1863 mode->flags = 0;
1866 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1868 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1870 mode->flags |= DRM_MODE_FLAG_CSYNC;
1872 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1874 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1876 mode->crtc_clock = mode->clock =
2122 /* last mode is usually default, array is low to high */
2257 /* last mode is usually default */
2443 /* NI chips post without MC ucode, so default clocks are strobe mode only */
2596 /* first mode is usually default, followed by low to high */
2648 /* first mode is usually default */
2745 /* first mode is usually default */
2794 /* add the default mode */
4087 /* tell the bios not to handle mode switching */