Lines Matching defs:gpio
47 ATOM_GPIO_I2C_ASSIGMENT *gpio,
54 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
55 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
57 gpio->ucClkMaskShift = 0x19;
58 gpio->ucDataMaskShift = 0x18;
65 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
66 (gpio->sucI2cId.ucAccess == 0)) {
67 gpio->sucI2cId.ucAccess = 0x97;
68 gpio->ucDataMaskShift = 8;
69 gpio->ucDataEnShift = 8;
70 gpio->ucDataY_Shift = 8;
71 gpio->ucDataA_Shift = 8;
78 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
79 (gpio->sucI2cId.ucAccess == 0x94))
80 gpio->sucI2cId.ucAccess = 0x14;
84 static struct radeon_i2c_bus_rec radeon_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)
90 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
91 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
92 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
93 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
94 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
95 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
96 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
97 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
98 i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
99 i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
100 i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
101 i2c.en_data_mask = (1 << gpio->ucDataEnShift);
102 i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
103 i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
104 i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
105 i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
107 if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
112 if (gpio->sucI2cId.ucAccess == 0xa0)
117 i2c.i2c_id = gpio->sucI2cId.ucAccess;
131 ATOM_GPIO_I2C_ASSIGMENT *gpio;
147 gpio = &i2c_info->asGPIO_Info[0];
150 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
152 if (gpio->sucI2cId.ucAccess == id) {
153 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
156 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
157 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
167 ATOM_GPIO_I2C_ASSIGMENT *gpio;
181 gpio = &i2c_info->asGPIO_Info[0];
183 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
185 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
191 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
192 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
201 struct radeon_gpio_rec gpio;
208 memset(&gpio, 0, sizeof(struct radeon_gpio_rec));
209 gpio.valid = false;
220 gpio.id = pin->ucGPIO_ID;
221 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4;
222 gpio.shift = pin->ucGpioPinBitShift;
223 gpio.mask = (1 << pin->ucGpioPinBitShift);
224 gpio.valid = true;
232 return gpio;
236 struct radeon_gpio_rec *gpio)
250 hpd.gpio = *gpio;
251 if (gpio->reg == reg) {
252 switch(gpio->mask) {
534 struct radeon_gpio_rec gpio;
747 /* look up gpio for ddc, hpd */
787 gpio = radeon_atombios_lookup_gpio(rdev,
789 hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);
2151 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
2187 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
2223 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
3779 ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =
3782 if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)
3784 lut = &gpio->asVolGpioLut[0];
3785 for (i = 0; i < gpio->ucGpioEntryNum; i++) {
3793 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
3794 voltage_table->count = gpio->ucGpioEntryNum;
3795 voltage_table->phase_delay = gpio->ucPhaseDelay;