Lines Matching defs:rdev
46 * @rdev: radeon device pointer
53 static uint32_t radeon_invalid_rreg(struct radeon_device *rdev, uint32_t reg)
63 * @rdev: radeon device pointer
70 static void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
80 * @rdev: radeon device pointer
85 static void radeon_register_accessor_init(struct radeon_device *rdev)
87 rdev->mc_rreg = &radeon_invalid_rreg;
88 rdev->mc_wreg = &radeon_invalid_wreg;
89 rdev->pll_rreg = &radeon_invalid_rreg;
90 rdev->pll_wreg = &radeon_invalid_wreg;
91 rdev->pciep_rreg = &radeon_invalid_rreg;
92 rdev->pciep_wreg = &radeon_invalid_wreg;
95 if (rdev->family < CHIP_RV515) {
96 rdev->pcie_reg_mask = 0xff;
98 rdev->pcie_reg_mask = 0x7ff;
101 if (rdev->family <= CHIP_R580) {
102 rdev->pll_rreg = &r100_pll_rreg;
103 rdev->pll_wreg = &r100_pll_wreg;
105 if (rdev->family >= CHIP_R420) {
106 rdev->mc_rreg = &r420_mc_rreg;
107 rdev->mc_wreg = &r420_mc_wreg;
109 if (rdev->family >= CHIP_RV515) {
110 rdev->mc_rreg = &rv515_mc_rreg;
111 rdev->mc_wreg = &rv515_mc_wreg;
113 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
114 rdev->mc_rreg = &rs400_mc_rreg;
115 rdev->mc_wreg = &rs400_mc_wreg;
117 if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
118 rdev->mc_rreg = &rs690_mc_rreg;
119 rdev->mc_wreg = &rs690_mc_wreg;
121 if (rdev->family == CHIP_RS600) {
122 rdev->mc_rreg = &rs600_mc_rreg;
123 rdev->mc_wreg = &rs600_mc_wreg;
125 if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) {
126 rdev->mc_rreg = &rs780_mc_rreg;
127 rdev->mc_wreg = &rs780_mc_wreg;
130 if (rdev->family >= CHIP_BONAIRE) {
131 rdev->pciep_rreg = &cik_pciep_rreg;
132 rdev->pciep_wreg = &cik_pciep_wreg;
133 } else if (rdev->family >= CHIP_R600) {
134 rdev->pciep_rreg = &r600_pciep_rreg;
135 rdev->pciep_wreg = &r600_pciep_wreg;
139 static int radeon_invalid_get_allowed_info_register(struct radeon_device *rdev,
149 * @rdev: radeon device pointer
154 void radeon_agp_disable(struct radeon_device *rdev)
156 rdev->flags &= ~RADEON_IS_AGP;
157 if (rdev->family >= CHIP_R600) {
159 rdev->flags |= RADEON_IS_PCIE;
160 } else if (rdev->family >= CHIP_RV515 ||
161 rdev->family == CHIP_RV380 ||
162 rdev->family == CHIP_RV410 ||
163 rdev->family == CHIP_R423) {
165 rdev->flags |= RADEON_IS_PCIE;
166 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
167 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
168 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
171 rdev->flags |= RADEON_IS_PCI;
172 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
173 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry;
174 rdev->asic->gart.set_page = &r100_pci_gart_set_page;
176 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
2311 * @rdev: radeon device pointer
2318 int radeon_asic_init(struct radeon_device *rdev)
2320 radeon_register_accessor_init(rdev);
2323 if (rdev->flags & RADEON_SINGLE_CRTC)
2324 rdev->num_crtc = 1;
2326 rdev->num_crtc = 2;
2328 rdev->has_uvd = false;
2329 rdev->has_vce = false;
2331 switch (rdev->family) {
2337 rdev->asic = &r100_asic;
2343 rdev->asic = &r200_asic;
2349 if (rdev->flags & RADEON_IS_PCIE)
2350 rdev->asic = &r300_asic_pcie;
2352 rdev->asic = &r300_asic;
2357 rdev->asic = &r420_asic;
2359 if (rdev->bios == NULL) {
2360 rdev->asic->pm.get_engine_clock = &radeon_legacy_get_engine_clock;
2361 rdev->asic->pm.set_engine_clock = &radeon_legacy_set_engine_clock;
2362 rdev->asic->pm.get_memory_clock = &radeon_legacy_get_memory_clock;
2363 rdev->asic->pm.set_memory_clock = NULL;
2364 rdev->asic->display.set_backlight_level = &radeon_legacy_set_backlight_level;
2369 rdev->asic = &rs400_asic;
2372 rdev->asic = &rs600_asic;
2376 rdev->asic = &rs690_asic;
2379 rdev->asic = &rv515_asic;
2386 rdev->asic = &r520_asic;
2389 rdev->asic = &r600_asic;
2396 rdev->asic = &rv6xx_asic;
2397 rdev->has_uvd = true;
2401 rdev->asic = &rs780_asic;
2403 if ((rdev->pdev->device == 0x9616)||
2404 (rdev->pdev->device == 0x9611)||
2405 (rdev->pdev->device == 0x9613)||
2406 (rdev->pdev->device == 0x9711)||
2407 (rdev->pdev->device == 0x9713))
2408 rdev->has_uvd = false;
2410 rdev->has_uvd = true;
2416 rdev->asic = &rv770_asic;
2417 rdev->has_uvd = true;
2425 if (rdev->family == CHIP_CEDAR)
2426 rdev->num_crtc = 4;
2428 rdev->num_crtc = 6;
2429 rdev->asic = &evergreen_asic;
2430 rdev->has_uvd = true;
2435 rdev->asic = &sumo_asic;
2436 rdev->has_uvd = true;
2442 if (rdev->family == CHIP_CAICOS)
2443 rdev->num_crtc = 4;
2445 rdev->num_crtc = 6;
2446 rdev->asic = &btc_asic;
2447 rdev->has_uvd = true;
2450 rdev->asic = &cayman_asic;
2452 rdev->num_crtc = 6;
2453 rdev->has_uvd = true;
2456 rdev->asic = &trinity_asic;
2458 rdev->num_crtc = 4;
2459 rdev->has_uvd = true;
2460 rdev->has_vce = true;
2461 rdev->cg_flags =
2469 rdev->asic = &si_asic;
2471 if (rdev->family == CHIP_HAINAN)
2472 rdev->num_crtc = 0;
2473 else if (rdev->family == CHIP_OLAND)
2474 rdev->num_crtc = 2;
2476 rdev->num_crtc = 6;
2477 if (rdev->family == CHIP_HAINAN) {
2478 rdev->has_uvd = false;
2479 rdev->has_vce = false;
2480 } else if (rdev->family == CHIP_OLAND) {
2481 rdev->has_uvd = true;
2482 rdev->has_vce = false;
2484 rdev->has_uvd = true;
2485 rdev->has_vce = true;
2487 switch (rdev->family) {
2489 rdev->cg_flags =
2503 rdev->pg_flags = 0;
2506 rdev->cg_flags =
2522 rdev->pg_flags = 0;
2525 rdev->cg_flags =
2541 rdev->pg_flags = 0 |
2546 rdev->cg_flags =
2561 rdev->pg_flags = 0;
2564 rdev->cg_flags =
2578 rdev->pg_flags = 0;
2581 rdev->cg_flags = 0;
2582 rdev->pg_flags = 0;
2588 rdev->asic = &ci_asic;
2589 rdev->num_crtc = 6;
2590 rdev->has_uvd = true;
2591 rdev->has_vce = true;
2592 if (rdev->family == CHIP_BONAIRE) {
2593 rdev->cg_flags =
2610 rdev->pg_flags = 0;
2612 rdev->cg_flags =
2628 rdev->pg_flags = 0;
2634 rdev->asic = &kv_asic;
2636 if (rdev->family == CHIP_KAVERI) {
2637 rdev->num_crtc = 4;
2638 rdev->cg_flags =
2653 rdev->pg_flags = 0;
2665 rdev->num_crtc = 2;
2666 rdev->cg_flags =
2681 rdev->pg_flags = 0;
2691 rdev->has_uvd = true;
2692 rdev->has_vce = true;
2699 if (rdev->flags & RADEON_IS_IGP) {
2700 rdev->asic->pm.get_memory_clock = NULL;
2701 rdev->asic->pm.set_memory_clock = NULL;
2705 rdev->has_uvd = false;
2707 rdev->has_vce = false;