Lines Matching refs:PACKET3
2697 radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
2842 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2880 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
2886 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));
2894 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
2899 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
2902 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2906 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2937 radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));
2944 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
2991 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3002 radeon_ring_write(ring, PACKET3(PACKET3_CP_DMA, 4));
3011 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3373 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3379 radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3));
3386 radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
3415 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);