Lines Matching defs:ring
51 * However, scheduling such write to the ring seems harmless, i suspect
214 struct radeon_ring *ring = &rdev->ring[fence->ring];
219 radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_TL, 0));
220 radeon_ring_write(ring, 0);
221 radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_BR, 0));
222 radeon_ring_write(ring, 0);
224 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
225 radeon_ring_write(ring, R300_RB3D_DC_FLUSH);
226 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
227 radeon_ring_write(ring, R300_ZC_FLUSH);
229 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
230 radeon_ring_write(ring, (RADEON_WAIT_3D_IDLECLEAN |
233 radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
234 radeon_ring_write(ring, rdev->config.r300.hdp_cntl |
236 radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
237 radeon_ring_write(ring, rdev->config.r300.hdp_cntl);
239 radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));
240 radeon_ring_write(ring, fence->seq);
241 radeon_ring_write(ring, PACKET0(RADEON_GEN_INT_STATUS, 0));
242 radeon_ring_write(ring, RADEON_SW_INT_FIRE);
245 void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
268 r = radeon_ring_lock(rdev, ring, 64);
272 radeon_ring_write(ring, PACKET0(RADEON_ISYNC_CNTL, 0));
273 radeon_ring_write(ring,
278 radeon_ring_write(ring, PACKET0(R300_GB_TILE_CONFIG, 0));
279 radeon_ring_write(ring, gb_tile_config);
280 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
281 radeon_ring_write(ring,
284 radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0));
285 radeon_ring_write(ring, R300_PIPE_AUTO_CONFIG);
286 radeon_ring_write(ring, PACKET0(R300_GB_SELECT, 0));
287 radeon_ring_write(ring, 0);
288 radeon_ring_write(ring, PACKET0(R300_GB_ENABLE, 0));
289 radeon_ring_write(ring, 0);
290 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
291 radeon_ring_write(ring, R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE);
292 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
293 radeon_ring_write(ring, R300_ZC_FLUSH | R300_ZC_FREE);
294 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
295 radeon_ring_write(ring,
298 radeon_ring_write(ring, PACKET0(R300_GB_AA_CONFIG, 0));
299 radeon_ring_write(ring, 0);
300 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
301 radeon_ring_write(ring, R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE);
302 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
303 radeon_ring_write(ring, R300_ZC_FLUSH | R300_ZC_FREE);
304 radeon_ring_write(ring, PACKET0(R300_GB_MSPOS0, 0));
305 radeon_ring_write(ring,
314 radeon_ring_write(ring, PACKET0(R300_GB_MSPOS1, 0));
315 radeon_ring_write(ring,
323 radeon_ring_write(ring, PACKET0(R300_GA_ENHANCE, 0));
324 radeon_ring_write(ring, R300_GA_DEADLOCK_CNTL | R300_GA_FASTSYNC_CNTL);
325 radeon_ring_write(ring, PACKET0(R300_GA_POLY_MODE, 0));
326 radeon_ring_write(ring,
328 radeon_ring_write(ring, PACKET0(R300_GA_ROUND_MODE, 0));
329 radeon_ring_write(ring,
332 radeon_ring_unlock_commit(rdev, ring, false);
1420 /* 1M ring buffer */