Lines Matching refs:reg
56 u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg)
62 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));
68 void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v)
73 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));
78 u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg)
84 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));
90 void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v)
95 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));
100 u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg)
106 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));
112 void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v)
117 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));
1086 * @reg: register offset in bytes
1093 u32 reg, u32 *val)
1095 switch (reg) {
1103 *val = RREG32(reg);