Lines Matching refs:levels
778 &smc_state->levels[0],
785 &smc_state->levels[1],
792 &smc_state->levels[2],
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2;
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3;
802 smc_state->levels[0].ACIndex = 2;
803 smc_state->levels[1].ACIndex = 3;
804 smc_state->levels[2].ACIndex = 4;
806 smc_state->levels[0].ACIndex = 0;
807 smc_state->levels[1].ACIndex = 0;
808 smc_state->levels[2].ACIndex = 0;
1246 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1248 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1250 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1252 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1254 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1256 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1259 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1261 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1264 table->initialState.levels[0].mclk.mclk770.mclk_value =
1267 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
1269 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
1271 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
1273 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
1275 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
1278 table->initialState.levels[0].sclk.sclk_value =
1281 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0;
1283 table->initialState.levels[0].ACIndex = 0;
1288 &table->initialState.levels[0].vddc);
1294 &table->initialState.levels[0].vddci);
1297 &table->initialState.levels[0].mvdd);
1300 table->initialState.levels[0].aT = cpu_to_be32(a_t);
1302 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
1306 table->initialState.levels[0].gen2PCIE = 1;
1308 table->initialState.levels[0].gen2PCIE = 0;
1310 table->initialState.levels[0].gen2XSP = 1;
1312 table->initialState.levels[0].gen2XSP = 0;
1315 table->initialState.levels[0].strobeMode =
1320 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG;
1322 table->initialState.levels[0].mcFlags = 0;
1325 table->initialState.levels[1] = table->initialState.levels[0];
1326 table->initialState.levels[2] = table->initialState.levels[0];
1365 &table->ACPIState.levels[0].vddc);
1368 table->ACPIState.levels[0].gen2PCIE = 1;
1370 table->ACPIState.levels[0].gen2PCIE = 0;
1372 table->ACPIState.levels[0].gen2PCIE = 0;
1374 table->ACPIState.levels[0].gen2XSP = 1;
1376 table->ACPIState.levels[0].gen2XSP = 0;
1381 &table->ACPIState.levels[0].vddc);
1382 table->ACPIState.levels[0].gen2PCIE = 0;
1390 &table->ACPIState.levels[0].vddci);
1436 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1438 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1440 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1442 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1444 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1446 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
1448 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;
1450 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
1452 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
1454 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
1457 table->ACPIState.levels[0].sclk.sclk_value = 0;
1459 cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
1462 table->ACPIState.levels[0].ACIndex = 1;
1464 table->ACPIState.levels[1] = table->ACPIState.levels[0];
1465 table->ACPIState.levels[2] = table->ACPIState.levels[0];