Lines Matching defs:reg_offset
2328 u32 reg_offset, split_equal_to_row_size;
2350 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
2351 tile[reg_offset] = 0;
2352 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++)
2353 macrotile[reg_offset] = 0;
2493 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
2494 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);
2495 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++)
2496 WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);
2636 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
2637 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);
2638 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++)
2639 WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);
2861 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
2862 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);
2863 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++)
2864 WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);
3004 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
3005 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);
3006 for (reg_offset = 0; reg_offset < num_secondary_tile_mode_states; reg_offset++)
3007 WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);