Lines Matching defs:enable
141 bool enable);
3856 * cik_cp_gfx_enable - enable/disable the gfx CP MEs
3859 * @enable: enable or disable the MEs
3863 static void cik_cp_gfx_enable(struct radeon_device *rdev, bool enable)
3865 if (enable)
4210 * cik_cp_compute_enable - enable/disable the compute CP MEs
4213 * @enable: enable or disable the MEs
4217 static void cik_cp_compute_enable(struct radeon_device *rdev, bool enable)
4219 if (enable)
4614 /* enable doorbell? */
4699 /* enable the doorbell if requested */
4745 static void cik_cp_enable(struct radeon_device *rdev, bool enable)
4747 cik_cp_gfx_enable(rdev, enable);
4748 cik_cp_compute_enable(rdev, enable);
5409 * cik_pcie_gart_enable - gart enable
5476 /* enable context1-15 */
5758 bool enable)
5762 if (enable)
5769 static void cik_enable_lbpw(struct radeon_device *rdev, bool enable)
5774 if (enable)
5990 static void cik_enable_cgcg(struct radeon_device *rdev, bool enable)
5996 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGCG)) {
6026 static void cik_enable_mgcg(struct radeon_device *rdev, bool enable)
6030 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_MGCG)) {
6120 bool enable)
6127 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_LS))
6137 bool enable)
6144 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_MC_MGCG))
6154 bool enable)
6158 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_SDMA_MGCG)) {
6175 bool enable)
6179 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_SDMA_LS)) {
6203 bool enable)
6207 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_UVD_MGCG)) {
6229 bool enable)
6235 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_BIF_LS))
6247 bool enable)
6253 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_MGCG))
6263 bool enable)
6269 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_HDP_LS))
6279 u32 block, bool enable)
6285 if (enable) {
6297 cik_enable_mc_mgcg(rdev, enable);
6298 cik_enable_mc_ls(rdev, enable);
6303 cik_enable_sdma_mgcg(rdev, enable);
6304 cik_enable_sdma_mgls(rdev, enable);
6308 cik_enable_bif_mgls(rdev, enable);
6313 cik_enable_uvd_mgcg(rdev, enable);
6317 cik_enable_hdp_mgcg(rdev, enable);
6318 cik_enable_hdp_ls(rdev, enable);
6322 vce_v2_0_enable_mgcg(rdev, enable);
6353 bool enable)
6358 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_RLC_SMU_HS))
6367 bool enable)
6372 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_RLC_SMU_HS))
6380 static void cik_enable_cp_pg(struct radeon_device *rdev, bool enable)
6385 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_CP))
6393 static void cik_enable_gds_pg(struct radeon_device *rdev, bool enable)
6398 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GDS))
6495 bool enable)
6499 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) {
6581 bool enable)
6586 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_SMG))
6595 bool enable)
6600 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_DMG))
6660 static void cik_update_gfx_pg(struct radeon_device *rdev, bool enable)
6662 cik_enable_gfx_cgpg(rdev, enable);
6663 cik_enable_gfx_static_mgpg(rdev, enable);
6664 cik_enable_gfx_dynamic_mgpg(rdev, enable);
6852 * Clear all interrupt enable bits used by the driver (CIK).
6925 * cik_irq_init - init and enable the interrupt ring
6930 * enable the RLC, disable interrupts, enable the IH
6931 * ring buffer and enable it (CIK).
7000 /* enable irqs */
7007 * cik_irq_set - enable/disable interrupt sources
7026 WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
7029 /* don't enable anything if the ih is disabled */
7060 /* enable CP interrupts on all rings */
8282 /* enable pcie gen2/3 link */
8284 /* enable aspm */
8810 * to enable based on the display width. For display widths larger