Lines Matching defs:buffer
3604 * @ring: radeon ring buffer object
3711 * @ib: radeon indirect buffer object
3726 /* set switch buffer packet before const IB */
3843 * The CE is an asynchronous engine used for updating buffer desciptors
4038 * cik_cp_gfx_resume - setup the gfx ring buffer registers
4042 * Program the location and size of the gfx ring buffer
4067 /* Set ring buffer size */
4076 /* Initialize the ring buffer's read and write pointers */
5587 * @ib: indirect buffer pointer
6423 /* write the cp table buffer */
6699 void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
6707 if (buffer == NULL)
6710 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
6711 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);
6713 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
6714 buffer[count++] = cpu_to_le32(0x80000000);
6715 buffer[count++] = cpu_to_le32(0x80000000);
6720 buffer[count++] =
6722 buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000);
6724 buffer[count++] = cpu_to_le32(ext->extent[i]);
6731 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
6732 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
6735 buffer[count++] = cpu_to_le32(0x16000012);
6736 buffer[count++] = cpu_to_le32(0x00000000);
6739 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
6740 buffer[count++] = cpu_to_le32(0x00000000);
6744 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
6745 buffer[count++] = cpu_to_le32(0x00000000);
6748 buffer[count++] = cpu_to_le32(0x3a00161a);
6749 buffer[count++] = cpu_to_le32(0x0000002e);
6752 buffer[count++] = cpu_to_le32(0x00000000);
6753 buffer[count++] = cpu_to_le32(0x00000000);
6757 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
6758 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);
6760 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));
6761 buffer[count++] = cpu_to_le32(0);
6792 * Starting with r6xx, interrupts are handled via a ring buffer.
6799 * writes vectors to the ring buffer, it increments the
6806 * cik_enable_interrupts - Enable the interrupt ring buffer
6810 * Enable the interrupt ring buffer (CIK).
6825 * cik_disable_interrupts - Disable the interrupt ring buffer
6829 * Disable the interrupt ring buffer (CIK).
6929 * Allocate a ring buffer for the interrupt controller,
6931 * ring buffer and enable it (CIK).
7461 * buffer (CIK).
7471 * cik_get_ih_wptr - get the IH ring buffer wptr
7475 * Get the IH ring buffer wptr from either the register
7476 * or the writeback memory buffer (CIK). Also check for
7477 * ring buffer overflow and deal with it.
7492 /* When a ring buffer overflow happen start parsing interrupt
7496 dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
8328 /* allocate wb buffer */
8789 * dce8_line_buffer_adjust - Set up the line buffer
8796 * Setup up the line buffer allocation for
8798 * Returns the line buffer size in pixels.
8910 u32 lb_size; /* line buffer allocated to pipe */
9223 * @lb_size: line buffer size
9363 * buffer allocation (CIK).