Lines Matching refs:dss
38 #include "dss.h"
54 #define REG_GET(dss, idx, start, end) \
55 FLD_GET(dss_read_reg(dss, idx), start, end)
57 #define REG_FLD_MOD(dss, idx, val, start, end) \
58 dss_write_reg(dss, idx, \
59 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
62 int (*dpi_select_source)(struct dss_device *dss, int port,
64 int (*select_lcd_source)(struct dss_device *dss,
94 static inline void dss_write_reg(struct dss_device *dss,
97 __raw_writel(val, dss->base + idx.idx);
100 static inline u32 dss_read_reg(struct dss_device *dss, const struct dss_reg idx)
102 return __raw_readl(dss->base + idx.idx);
105 #define SR(dss, reg) \
106 dss->ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(dss, DSS_##reg)
107 #define RR(dss, reg) \
108 dss_write_reg(dss, DSS_##reg, dss->ctx[(DSS_##reg).idx / sizeof(u32)])
110 static void dss_save_context(struct dss_device *dss)
114 SR(dss, CONTROL);
116 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
117 SR(dss, SDI_CONTROL);
118 SR(dss, PLL_CONTROL);
121 dss->ctx_valid = true;
126 static void dss_restore_context(struct dss_device *dss)
130 if (!dss->ctx_valid)
133 RR(dss, CONTROL);
135 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
136 RR(dss, SDI_CONTROL);
137 RR(dss, PLL_CONTROL);
151 if (!pll->dss->syscon_pll_ctrl)
171 regmap_update_bits(pll->dss->syscon_pll_ctrl,
172 pll->dss->syscon_pll_ctrl_offset,
176 static int dss_ctrl_pll_set_control_mux(struct dss_device *dss,
182 if (!dss->syscon_pll_ctrl)
237 regmap_update_bits(dss->syscon_pll_ctrl, dss->syscon_pll_ctrl_offset,
243 void dss_sdi_init(struct dss_device *dss, int datapairs)
249 l = dss_read_reg(dss, DSS_SDI_CONTROL);
253 dss_write_reg(dss, DSS_SDI_CONTROL, l);
255 l = dss_read_reg(dss, DSS_PLL_CONTROL);
259 dss_write_reg(dss, DSS_PLL_CONTROL, l);
262 int dss_sdi_enable(struct dss_device *dss)
266 dispc_pck_free_enable(dss->dispc, 1);
269 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 18, 18); /* SDI_PLL_SYSRESET */
273 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 1, 28, 28); /* SDI_PLL_GOBIT */
277 while (dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 6)) {
285 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 28, 28);
289 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 5))) {
296 dispc_lcd_enable_signal(dss->dispc, 1);
300 while (!(dss_read_reg(dss, DSS_SDI_STATUS) & (1 << 2))) {
310 dispc_lcd_enable_signal(dss->dispc, 0);
313 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
315 dispc_pck_free_enable(dss->dispc, 0);
320 void dss_sdi_disable(struct dss_device *dss)
322 dispc_lcd_enable_signal(dss->dispc, 0);
324 dispc_pck_free_enable(dss->dispc, 0);
327 REG_FLD_MOD(dss, DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */
335 static void dss_dump_clocks(struct dss_device *dss, struct seq_file *s)
340 if (dss_runtime_get(dss))
346 fclk_rate = clk_get_rate(dss->dss_clk);
352 dss_runtime_put(dss);
357 struct dss_device *dss = s->private;
359 #define DUMPREG(dss, r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(dss, r))
361 if (dss_runtime_get(dss))
364 DUMPREG(dss, DSS_REVISION);
365 DUMPREG(dss, DSS_SYSCONFIG);
366 DUMPREG(dss, DSS_SYSSTATUS);
367 DUMPREG(dss, DSS_CONTROL);
369 if (dss->feat->outputs[OMAP_DSS_CHANNEL_LCD] & OMAP_DSS_OUTPUT_SDI) {
370 DUMPREG(dss, DSS_SDI_CONTROL);
371 DUMPREG(dss, DSS_PLL_CONTROL);
372 DUMPREG(dss, DSS_SDI_STATUS);
375 dss_runtime_put(dss);
382 struct dss_device *dss = s->private;
384 dss_dump_clocks(dss, s);
385 dispc_dump_clocks(dss->dispc, s);
404 static void dss_select_dispc_clk_source(struct dss_device *dss,
413 if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK))
431 REG_FLD_MOD(dss, DSS_CONTROL, b, /* DISPC_CLK_SWITCH */
432 dss->feat->dispc_clk_switch.start,
433 dss->feat->dispc_clk_switch.end);
435 dss->dispc_clk_source = clk_src;
438 void dss_select_dsi_clk_source(struct dss_device *dss, int dsi_module,
461 REG_FLD_MOD(dss, DSS_CONTROL, b, pos, pos); /* DSIx_CLK_SWITCH */
463 dss->dsi_clk_source[dsi_module] = clk_src;
466 static int dss_lcd_clk_mux_dra7(struct dss_device *dss,
481 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
485 r = dss_ctrl_pll_set_control_mux(dss, clk_src, channel);
489 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
494 static int dss_lcd_clk_mux_omap5(struct dss_device *dss,
513 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
520 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
525 static int dss_lcd_clk_mux_omap4(struct dss_device *dss,
542 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit);
549 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit);
554 void dss_select_lcd_clk_source(struct dss_device *dss,
561 if (!dss->feat->has_lcd_clk_src) {
562 dss_select_dispc_clk_source(dss, clk_src);
563 dss->lcd_clk_source[idx] = clk_src;
567 r = dss->feat->ops->select_lcd_source(dss, channel, clk_src);
571 dss->lcd_clk_source[idx] = clk_src;
574 enum dss_clk_source dss_get_dispc_clk_source(struct dss_device *dss)
576 return dss->dispc_clk_source;
579 enum dss_clk_source dss_get_dsi_clk_source(struct dss_device *dss,
582 return dss->dsi_clk_source[dsi_module];
585 enum dss_clk_source dss_get_lcd_clk_source(struct dss_device *dss,
588 if (dss->feat->has_lcd_clk_src) {
590 return dss->lcd_clk_source[idx];
594 return dss->dispc_clk_source;
598 bool dss_div_calc(struct dss_device *dss, unsigned long pck,
608 fck_hw_max = dss->feat->fck_freq_max;
610 if (dss->parent_clk == NULL) {
617 fck = clk_round_rate(dss->dss_clk, fck);
622 fckd_hw_max = dss->feat->fck_div_max;
624 m = dss->feat->dss_fck_multiplier;
625 prate = clk_get_rate(dss->parent_clk);
642 int dss_set_fck_rate(struct dss_device *dss, unsigned long rate)
648 r = clk_set_rate(dss->dss_clk, rate);
652 dss->dss_clk_rate = clk_get_rate(dss->dss_clk);
654 WARN_ONCE(dss->dss_clk_rate != rate, "clk rate mismatch: %lu != %lu",
655 dss->dss_clk_rate, rate);
660 unsigned long dss_get_dispc_clk_rate(struct dss_device *dss)
662 return dss->dss_clk_rate;
665 unsigned long dss_get_max_fck_rate(struct dss_device *dss)
667 return dss->feat->fck_freq_max;
670 static int dss_setup_default_clock(struct dss_device *dss)
677 max_dss_fck = dss->feat->fck_freq_max;
679 if (dss->parent_clk == NULL) {
680 fck = clk_round_rate(dss->dss_clk, max_dss_fck);
682 prate = clk_get_rate(dss->parent_clk);
684 fck_div = DIV_ROUND_UP(prate * dss->feat->dss_fck_multiplier,
687 * dss->feat->dss_fck_multiplier;
690 r = dss_set_fck_rate(dss, fck);
697 void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type)
709 REG_FLD_MOD(dss, DSS_CONTROL, l, 6, 6);
712 void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable)
715 REG_FLD_MOD(dss, DSS_CONTROL, enable, 5, 5);
718 void dss_select_hdmi_venc_clk_source(struct dss_device *dss,
723 outputs = dss->feat->outputs[OMAP_DSS_CHANNEL_DIGIT];
733 REG_FLD_MOD(dss, DSS_CONTROL, src, 15, 15);
736 static int dss_dpi_select_source_omap2_omap3(struct dss_device *dss, int port,
745 static int dss_dpi_select_source_omap4(struct dss_device *dss, int port,
761 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 17);
766 static int dss_dpi_select_source_omap5(struct dss_device *dss, int port,
788 REG_FLD_MOD(dss, DSS_CONTROL, val, 17, 16);
793 static int dss_dpi_select_source_dra7xx(struct dss_device *dss, int port,
798 return dss_dpi_select_source_omap5(dss, port, channel);
814 int dss_dpi_select_source(struct dss_device *dss, int port,
817 return dss->feat->ops->dpi_select_source(dss, port, channel);
820 static int dss_get_clocks(struct dss_device *dss)
824 clk = devm_clk_get(&dss->pdev->dev, "fck");
830 dss->dss_clk = clk;
832 if (dss->feat->parent_clk_name) {
833 clk = clk_get(NULL, dss->feat->parent_clk_name);
836 dss->feat->parent_clk_name);
843 dss->parent_clk = clk;
848 static void dss_put_clocks(struct dss_device *dss)
850 if (dss->parent_clk)
851 clk_put(dss->parent_clk);
854 int dss_runtime_get(struct dss_device *dss)
860 r = pm_runtime_get_sync(&dss->pdev->dev);
862 pm_runtime_put_noidle(&dss->pdev->dev);
868 void dss_runtime_put(struct dss_device *dss)
874 r = pm_runtime_put_sync(&dss->pdev->dev);
885 static int dss_initialize_debugfs(struct dss_device *dss)
893 dss->debugfs.root = dir;
898 static void dss_uninitialize_debugfs(struct dss_device *dss)
900 debugfs_remove_recursive(dss->debugfs.root);
924 dss_debugfs_create_file(struct dss_device *dss, const char *name,
936 entry->dentry = debugfs_create_file(name, 0444, dss->debugfs.root,
952 static inline int dss_initialize_debugfs(struct dss_device *dss)
956 static inline void dss_uninitialize_debugfs(struct dss_device *dss)
1157 static void __dss_uninit_ports(struct dss_device *dss, unsigned int num_ports)
1159 struct platform_device *pdev = dss->pdev;
1169 switch (dss->feat->ports[i]) {
1183 static int dss_init_ports(struct dss_device *dss)
1185 struct platform_device *pdev = dss->pdev;
1191 for (i = 0; i < dss->feat->num_ports; i++) {
1196 switch (dss->feat->ports[i]) {
1198 r = dpi_init_port(dss, pdev, port, dss->feat->model);
1204 r = sdi_init_port(dss, pdev, port);
1219 __dss_uninit_ports(dss, i);
1223 static void dss_uninit_ports(struct dss_device *dss)
1225 __dss_uninit_ports(dss, dss->feat->num_ports);
1228 static int dss_video_pll_probe(struct dss_device *dss)
1230 struct platform_device *pdev = dss->pdev;
1239 dss->syscon_pll_ctrl = syscon_regmap_lookup_by_phandle(np,
1241 if (IS_ERR(dss->syscon_pll_ctrl)) {
1244 return PTR_ERR(dss->syscon_pll_ctrl);
1248 &dss->syscon_pll_ctrl_offset)) {
1274 dss->video1_pll = dss_video_pll_init(dss, pdev, 0,
1276 if (IS_ERR(dss->video1_pll))
1277 return PTR_ERR(dss->video1_pll);
1281 dss->video2_pll = dss_video_pll_init(dss, pdev, 1,
1283 if (IS_ERR(dss->video2_pll)) {
1284 dss_video_pll_uninit(dss->video1_pll);
1285 return PTR_ERR(dss->video2_pll);
1294 { .compatible = "ti,omap2-dss", .data = &omap24xx_dss_feats },
1295 { .compatible = "ti,omap3-dss", .data = &omap3630_dss_feats },
1296 { .compatible = "ti,omap4-dss", .data = &omap44xx_dss_feats },
1297 { .compatible = "ti,omap5-dss", .data = &omap54xx_dss_feats },
1298 { .compatible = "ti,dra7-dss", .data = &dra7xx_dss_feats },
1312 struct dss_device *dss = dev_get_drvdata(dev);
1323 pdata.dss = dss;
1331 dss->drm_pdev = drm_pdev;
1338 struct dss_device *dss = dev_get_drvdata(dev);
1340 platform_device_unregister(dss->drm_pdev);
1363 * Otherwise dss will never get probed successfully, as it will wait
1384 static int dss_probe_hardware(struct dss_device *dss)
1389 r = dss_runtime_get(dss);
1393 dss->dss_clk_rate = clk_get_rate(dss->dss_clk);
1396 REG_FLD_MOD(dss, DSS_CONTROL, 0, 0, 0);
1398 dss_select_dispc_clk_source(dss, DSS_CLK_SRC_FCK);
1401 REG_FLD_MOD(dss, DSS_CONTROL, 1, 4, 4); /* venc dac demen */
1402 REG_FLD_MOD(dss, DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */
1403 REG_FLD_MOD(dss, DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */
1405 dss->dsi_clk_source[0] = DSS_CLK_SRC_FCK;
1406 dss->dsi_clk_source[1] = DSS_CLK_SRC_FCK;
1407 dss->dispc_clk_source = DSS_CLK_SRC_FCK;
1408 dss->lcd_clk_source[0] = DSS_CLK_SRC_FCK;
1409 dss->lcd_clk_source[1] = DSS_CLK_SRC_FCK;
1411 rev = dss_read_reg(dss, DSS_REVISION);
1414 dss_runtime_put(dss);
1424 struct dss_device *dss;
1427 dss = kzalloc(sizeof(*dss), GFP_KERNEL);
1428 if (!dss)
1431 dss->pdev = pdev;
1432 platform_set_drvdata(pdev, dss);
1446 dss->feat = soc->data;
1448 dss->feat = of_match_device(dss_of_match, &pdev->dev)->data;
1451 dss->base = devm_platform_ioremap_resource(pdev, 0);
1452 if (IS_ERR(dss->base)) {
1453 r = PTR_ERR(dss->base);
1457 r = dss_get_clocks(dss);
1461 r = dss_setup_default_clock(dss);
1466 r = dss_video_pll_probe(dss);
1470 r = dss_init_ports(dss);
1477 r = dss_probe_hardware(dss);
1482 r = dss_initialize_debugfs(dss);
1486 dss->debugfs.clk = dss_debugfs_create_file(dss, "clk",
1487 dss_debug_dump_clocks, dss);
1488 dss->debugfs.dss = dss_debugfs_create_file(dss, "dss", dss_dump_regs,
1489 dss);
1512 dss_debugfs_remove_file(dss->debugfs.clk);
1513 dss_debugfs_remove_file(dss->debugfs.dss);
1514 dss_uninitialize_debugfs(dss);
1518 dss_uninit_ports(dss);
1521 if (dss->video1_pll)
1522 dss_video_pll_uninit(dss->video1_pll);
1523 if (dss->video2_pll)
1524 dss_video_pll_uninit(dss->video2_pll);
1527 dss_put_clocks(dss);
1530 kfree(dss);
1537 struct dss_device *dss = platform_get_drvdata(pdev);
1543 dss_debugfs_remove_file(dss->debugfs.clk);
1544 dss_debugfs_remove_file(dss->debugfs.dss);
1545 dss_uninitialize_debugfs(dss);
1549 dss_uninit_ports(dss);
1551 if (dss->video1_pll)
1552 dss_video_pll_uninit(dss->video1_pll);
1554 if (dss->video2_pll)
1555 dss_video_pll_uninit(dss->video2_pll);
1557 dss_put_clocks(dss);
1559 kfree(dss);
1569 struct dss_device *dss = dev_get_drvdata(dev);
1571 dss_save_context(dss);
1581 struct dss_device *dss = dev_get_drvdata(dev);
1597 dss_restore_context(dss);