Lines Matching defs:base
44 return container_of(fence, struct nouveau_fence, base);
50 return container_of(fence->base.lock, struct nouveau_fence_chan, lock);
58 dma_fence_signal_locked(&fence->base);
62 if (test_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags)) {
69 dma_fence_put(&fence->base);
94 dma_fence_set_error(&fence->base, error);
140 if ((int)(seq - fence->base.seqno) < 0)
187 struct nvif_event_v0 base;
203 strcpy(fctx->name, nvxx_client(&cli->base)->name);
214 &args.base, sizeof(args), &fctx->event);
230 dma_fence_init(&fence->base, &nouveau_fence_ops_uevent,
233 dma_fence_init(&fence->base, &nouveau_fence_ops_legacy,
239 dma_fence_get(&fence->base);
244 dma_fence_put(&fence->base);
261 if (fence->base.ops == &nouveau_fence_ops_legacy ||
262 fence->base.ops == &nouveau_fence_ops_uevent) {
267 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags))
276 return dma_fence_is_signaled(&fence->base);
347 ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ);
361 struct dma_resv *resv = nvbo->bo.base.resv;
413 dma_fence_put(&(*pfence)->base);
482 ret = (int)(fctx->read(chan) - fence->base.seqno) >= 0;
496 WARN_ON(kref_read(&fence->base.refcount) <= 1);
506 dma_fence_put(&fence->base);
519 dma_fence_free(&fence->base);
542 set_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags);