Lines Matching refs:NVDEF
458 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, LOCAL_FB));
462 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, COHERENT_SYSMEM));
468 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, PHYSICAL);
475 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
479 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
485 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
503 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
504 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
505 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
506 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
507 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
508 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
509 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
510 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
511 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));
530 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
534 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
540 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
546 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_X, CONST_A) |
547 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_Y, CONST_B) |
548 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, COMPONENT_SIZE, FOUR) |
549 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, NUM_DST_COMPONENTS, TWO));
559 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
560 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
561 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
562 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
563 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
564 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
565 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, FALSE) |
566 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, TRUE) |
567 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));