Lines Matching refs:asyw
40 wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
48 PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
66 wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
75 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |
76 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |
77 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),
79 SET_OFFSET_INPUT_LUT, asyw->xlut.i.offset >> 8,
80 SET_CONTEXT_DMA_INPUT_LUT, asyw->xlut.handle);
85 wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
87 asyw->xlut.i.size = size == 1024 ? NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 :
89 asyw->xlut.i.range = NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY;
90 asyw->xlut.i.output_mode = NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE;
91 asyw->xlut.i.load = head907d_olut_load;
95 wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
105 NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),
108 NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |
113 asyw->blend.src_color) |
115 asyw->blend.src_color) |
117 asyw->blend.dst_color) |
119 asyw->blend.dst_color),
157 wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
166 NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |
167 NVVAL(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
171 NVVAL(NVC37E, SET_SIZE, WIDTH, asyw->image.w) |
172 NVVAL(NVC37E, SET_SIZE, HEIGHT, asyw->image.h),
175 NVVAL(NVC37E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
176 NVVAL(NVC37E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
179 NVVAL(NVC37E, SET_PARAMS, FORMAT, asyw->image.format) |
180 NVVAL(NVC37E, SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |
184 NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |
189 NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |
190 NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
192 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
193 PUSH_MTHD(push, NVC37E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
196 NVVAL(NVC37E, SET_POINT_IN, X, asyw->state.src_x >> 16) |
197 NVVAL(NVC37E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
200 NVVAL(NVC37E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |
201 NVVAL(NVC37E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
204 NVVAL(NVC37E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |
205 NVVAL(NVC37E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
223 wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
231 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle,
234 NVVAL(NVC37E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |
235 NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));
253 wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
261 PUSH_MTHD(push, NVC37E, SET_SEMAPHORE_CONTROL, asyw->sema.offset,
262 SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire,
263 SET_SEMAPHORE_RELEASE, asyw->sema.release,
264 SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle);
289 wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
295 wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
298 return drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,