Lines Matching refs:ret
81 int ret, i, n;
85 ret = n = nvif_object_sclass_get(disp, &sclass);
86 if (ret < 0)
87 return ret;
92 ret = nvif_object_ctor(disp, "kmsChan", 0,
95 if (ret == 0)
98 return ret;
199 int ret = nv50_dmac_wind(dmac);
200 if (ret)
201 return ret;
235 int ret;
252 ret = nvif_mem_ctor_map(&cli->mmu, "kmsChanPush", type, 0x1000,
254 if (ret)
255 return ret;
274 ret = nv50_chan_create(device, disp, oclass, head, data, size,
276 if (ret)
277 return ret;
282 ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF,
291 if (ret)
292 return ret;
294 ret = nvif_object_ctor(&dmac->base.user, "kmsVramCtxDma", NV50_DISP_HANDLE_VRAM,
303 if (ret)
304 return ret;
306 return ret;
404 int ret;
406 ret = nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
408 if (ret)
409 return ret;
518 int ret;
524 ret = nvif_outp_load_detect(&nv_encoder->outp, loadval);
525 if (ret <= 0)
607 int ret = 0;
628 ret = drm_eld_size(nv_connector->base.eld);
630 min(max_bytes, ret));
637 return ret;
783 int ret, size;
793 ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &scdc);
794 if (ret < 0) {
795 NV_ERROR(drm, "Failure to read SCDC_TMDS_CONFIG: %d\n", ret);
805 ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, scdc);
806 if (ret < 0)
808 scdc, ret);
811 ret = nvif_outp_acquire_tmds(&nv_encoder->outp, nv_crtc->index, true,
813 if (ret)
950 int ret;
952 ret = nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
954 if (ret)
955 return ret;
1085 int ret;
1091 ret = drm_encoder_init(dev, &msto->encoder, &nv50_msto,
1093 if (ret) {
1095 return ERR_PTR(ret);
1137 int ret = 0;
1142 ret = drm_add_edid_modes(&mstc->connector, mstc->edid);
1159 return ret;
1177 int ret;
1182 ret = pm_runtime_get_sync(connector->dev->dev);
1183 if (ret < 0 && ret != -EACCES) {
1188 ret = drm_dp_mst_detect_port(connector, ctx, mstc->port->mgr,
1190 if (ret != connector_status_connected)
1196 return ret;
1237 int ret;
1244 ret = drm_connector_init(dev, &mstc->connector, &nv50_mstc,
1246 if (ret) {
1249 return ret;
1340 int ret;
1342 ret = nv50_mstc_new(mstm, port, path, &mstc);
1343 if (ret)
1360 bool handled = true, ret = true;
1369 ret = false;
1380 ret = false;
1387 if (!ret)
1391 return ret;
1406 int ret;
1416 ret = drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0);
1417 if (ret < 0)
1418 return ret;
1421 ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, true);
1422 if (ret)
1423 return ret;
1453 int ret = 0;
1459 ret = drm_dp_mst_topology_mgr_resume(&mstm->mgr, !runtime);
1460 if (ret == -1)
1468 if (ret == -1)
1490 int ret;
1497 ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max,
1499 if (ret)
1500 return ret;
1544 int ret;
1549 ret = drm_edp_backlight_disable(aux, &backlight->edp_info);
1550 if (ret < 0)
1552 nv_connector->base.base.id, nv_connector->base.name, ret);
1557 ret = drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr);
1559 if (ret == 0) {
1728 int type, ret;
1778 ret = nv50_mstm_new(nv_encoder, &nv_connector->aux,
1781 if (ret)
1782 return ret;
1802 int ret = nv50_outp_atomic_check(encoder, crtc_state, conn_state);
1803 if (ret)
1804 return ret;
2212 int ret = nv50_wndw_wait_armed(wndw, asyw);
2213 if (ret)
2261 int ret, i;
2263 ret = pm_runtime_get_sync(dev->dev);
2264 if (ret < 0 && ret != -EACCES) {
2266 return ret;
2269 ret = drm_atomic_helper_setup_commit(state, nonblock);
2270 if (ret)
2275 ret = drm_atomic_helper_prepare_planes(dev, state);
2276 if (ret)
2280 ret = drm_atomic_helper_wait_for_fences(dev, state, true);
2281 if (ret)
2285 ret = drm_atomic_helper_swap_state(state, true);
2286 if (ret)
2311 if (ret)
2315 return ret;
2403 int ret, i;
2421 ret = drm_atomic_add_affected_planes(state, crtc);
2422 if (ret)
2423 return ret;
2427 ret = drm_atomic_helper_check(dev, state);
2428 if (ret)
2429 return ret;
2432 ret = nv50_disp_outp_atomic_check_clr(atom, old_connector_state);
2433 if (ret)
2434 return ret;
2436 ret = nv50_disp_outp_atomic_check_set(atom, new_connector_state);
2437 if (ret)
2438 return ret;
2441 ret = drm_dp_mst_atomic_check(state);
2442 if (ret)
2443 return ret;
2569 int crtcs, ret, i;
2589 ret = nouveau_bo_new(&drm->client, 4096, 0x1000,
2592 if (!ret) {
2593 ret = nouveau_bo_pin(disp->sync, NOUVEAU_GEM_DOMAIN_VRAM, true);
2594 if (!ret) {
2595 ret = nouveau_bo_map(disp->sync);
2596 if (ret)
2599 if (ret)
2603 if (ret)
2607 ret = nv50_core_new(drm, &disp->core);
2608 if (ret)
2613 ret = disp->core->func->caps_init(drm, disp);
2614 if (ret)
2663 ret = PTR_ERR(head);
2670 ret = PTR_ERR(head->msto);
2700 ret = nv50_sor_create(connector, dcbe);
2703 ret = nv50_dac_create(connector, dcbe);
2706 ret = -ENODEV;
2710 ret = nv50_pior_create(connector, dcbe);
2713 if (ret) {
2716 ffs(dcbe->or) - 1, ret);
2717 ret = 0;
2737 if (ret)
2739 return ret;