Lines Matching refs:base
124 nv50_chan_destroy(&dmac->base);
140 struct nvif_device *device = dmac->base.device;
148 NVIF_WV32(&dmac->base.user, NV507C, PUT, PTR, dmac->cur);
158 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR);
170 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR);
176 if (nvif_msec(dmac->base.device, 2000,
177 if (NVIF_TV32(&dmac->base.user, NV507C, GET, PTR, >, 0))
208 if (nvif_msec(dmac->base.device, 2000,
275 &dmac->base);
282 ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF,
294 ret = nvif_object_ctor(&dmac->base.user, "kmsVramCtxDma", NV50_DISP_HANDLE_VRAM,
317 outp->base.base.name, outp->caps.dp_interlace);
457 const u32 mask = drm_encoder_mask(&outp->base.base);
489 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base));
510 nv_encoder->crtc = &nv_crtc->base;
583 return nvif_outp_ctor(disp->disp, nv_encoder->base.base.name, dcbe->id, &nv_encoder->outp);
628 ret = drm_eld_size(nv_connector->base.eld);
629 memcpy(buf, nv_connector->base.eld,
754 nvif_outp_hda_eld(&nv_encoder->outp, nv_crtc->index, nv_connector->base.eld,
755 drm_eld_size(nv_connector->base.eld));
757 nv_encoder->audio.connector = &nv_connector->base;
774 struct drm_hdmi_info *hdmi = &nv_connector->base.display_info.hdmi;
820 if (!drm_hdmi_avi_infoframe_from_display_mode(&infoframe.avi, &nv_connector->base, mode)) {
821 drm_hdmi_avi_infoframe_quant_range(&infoframe.avi, &nv_connector->base, mode,
834 &nv_connector->base, mode))
927 nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0);
932 nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index,
1009 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &head->base.base));
1039 mstm->outp->update(mstm->outp, head->base.index, asyh, proto,
1054 mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
1099 msto->encoder.possible_crtcs = drm_crtc_mask(&head->base.base);
1234 struct drm_device *dev = mstm->outp->base.base.dev;
1265 drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0);
1266 drm_object_attach_property(&mstc->connector.base, dev->mode_config.tile_property, 0);
1277 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
1280 NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name);
1283 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
1300 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
1303 NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name);
1306 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
1318 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
1389 nv_connector->base.name, rc);
1488 struct drm_device *dev = outp->base.base.dev;
1512 struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
1540 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
1552 nv_connector->base.base.id, nv_connector->base.name, ret);
1578 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base));
1594 nv_encoder->crtc = &nv_crtc->base;
1779 16, nv_connector->base.base.id,
1791 return nvif_outp_ctor(disp->disp, nv_encoder->base.base.name, dcbe->id, &nv_encoder->outp);
1827 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base));
1861 nv_encoder->crtc = &nv_crtc->base;
1939 return nvif_outp_ctor(disp->disp, nv_encoder->base.base.name, dcbe->id, &nv_encoder->outp);
1968 disp->core->chan.base.device))