Lines Matching defs:asyw
29 base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
38 NVVAL(NV907C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
40 NVVAL(NV907C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
42 PUSH_MTHD(push, NV907C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1);
44 PUSH_MTHD(push, NV907C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8,
48 NVVAL(NV907C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
49 NVVAL(NV907C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
52 NVVAL(NV907C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
53 NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
54 NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
55 NVVAL(NV907C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
58 NVVAL(NV907C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
85 base907c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
94 NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) |
95 NVVAL(NV907C, SET_BASE_LUT_LO, MODE, asyw->xlut.i.mode),
97 SET_BASE_LUT_HI, asyw->xlut.i.offset >> 8,
102 PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, asyw->xlut.handle);
107 base907c_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
110 asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE;
112 asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE;
114 asyw->xlut.i.enable = NV907C_SET_BASE_LUT_LO_ENABLE_ENABLE;
115 asyw->xlut.i.load = head907d_olut_load;
137 base907c_csc(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
144 u32 *val = &asyw->csc.matrix[j * 4 + i];
171 base907c_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
181 NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]),
183 SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11);