Lines Matching refs:head
55 int head;
63 head = (dacclk & 0x100) >> 8;
68 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
69 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
70 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
71 fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
73 ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
74 ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
75 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
81 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
82 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
83 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
84 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
99 NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
100 NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
103 NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
109 NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
115 NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
116 NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
117 NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
120 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
121 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
122 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
123 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
403 int head = nouveau_crtc(encoder->crtc)->index;
404 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[
412 nv04_dfp_disable(dev, head);
414 /* Unbind any FP encoders from this head if we need the FP
419 list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
425 nv04_dfp_get_bound_head(dev, dcb) == head) {
426 nv04_dfp_bind_head(dev, dcb, head ^ 1,
434 *cr_lcd |= 0x1 | (head ? 0x0 : 0x8);
445 if (head)
464 int head = nouveau_crtc(encoder->crtc)->index;
465 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];
478 if (head)
528 * encoder in its OR enabled and routed to the head it's