Lines Matching refs:lcdif
161 static void lcdif_set_formats(struct lcdif_drm_private *lcdif,
165 struct drm_device *drm = lcdif->drm;
173 lcdif->base + LCDC_V8_DISP_PARA);
177 lcdif->base + LCDC_V8_DISP_PARA);
181 lcdif->base + LCDC_V8_DISP_PARA);
193 lcdif->base + LCDC_V8_CTRLDESCL0_5);
197 lcdif->base + LCDC_V8_CTRLDESCL0_5);
201 lcdif->base + LCDC_V8_CTRLDESCL0_5);
205 lcdif->base + LCDC_V8_CTRLDESCL0_5);
209 lcdif->base + LCDC_V8_CTRLDESCL0_5);
213 lcdif->base + LCDC_V8_CTRLDESCL0_5);
219 lcdif->base + LCDC_V8_CTRLDESCL0_5);
224 lcdif->base + LCDC_V8_CTRLDESCL0_5);
229 lcdif->base + LCDC_V8_CTRLDESCL0_5);
234 lcdif->base + LCDC_V8_CTRLDESCL0_5);
253 lcdif->base + LCDC_V8_CSC0_CTRL);
263 lcdif->base + LCDC_V8_CSC0_COEF0);
265 lcdif->base + LCDC_V8_CSC0_COEF1);
267 lcdif->base + LCDC_V8_CSC0_COEF2);
269 lcdif->base + LCDC_V8_CSC0_COEF3);
271 lcdif->base + LCDC_V8_CSC0_COEF4);
273 lcdif->base + LCDC_V8_CSC0_COEF5);
281 lcdif->base + LCDC_V8_CSC0_CTRL);
283 writel(coeffs[0], lcdif->base + LCDC_V8_CSC0_COEF0);
284 writel(coeffs[1], lcdif->base + LCDC_V8_CSC0_COEF1);
285 writel(coeffs[2], lcdif->base + LCDC_V8_CSC0_COEF2);
286 writel(coeffs[3], lcdif->base + LCDC_V8_CSC0_COEF3);
287 writel(coeffs[4], lcdif->base + LCDC_V8_CSC0_COEF4);
288 writel(coeffs[5], lcdif->base + LCDC_V8_CSC0_COEF5);
291 writel(CSC0_CTRL_BYPASS, lcdif->base + LCDC_V8_CSC0_CTRL);
295 static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags)
297 struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;
309 writel(ctrl, lcdif->base + LCDC_V8_CTRL);
313 lcdif->base + LCDC_V8_DISP_SIZE);
317 lcdif->base + LCDC_V8_HSYN_PARA);
321 lcdif->base + LCDC_V8_VSYN_PARA);
325 lcdif->base + LCDC_V8_VSYN_HSYN_WIDTH);
329 lcdif->base + LCDC_V8_CTRLDESCL0_1);
341 CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);
342 writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);
345 static void lcdif_enable_controller(struct lcdif_drm_private *lcdif)
352 lcdif->base + LCDC_V8_PANIC0_THRES);
359 lcdif->base + LCDC_V8_INT_ENABLE_D1);
361 reg = readl(lcdif->base + LCDC_V8_DISP_PARA);
363 writel(reg, lcdif->base + LCDC_V8_DISP_PARA);
365 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
367 writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);
370 static void lcdif_disable_controller(struct lcdif_drm_private *lcdif)
375 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
377 writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);
379 ret = readl_poll_timeout(lcdif->base + LCDC_V8_CTRLDESCL0_5,
383 drm_err(lcdif->drm, "Failed to disable controller!\n");
385 reg = readl(lcdif->base + LCDC_V8_DISP_PARA);
387 writel(reg, lcdif->base + LCDC_V8_DISP_PARA);
390 writel(0, lcdif->base + LCDC_V8_INT_ENABLE_D1);
393 static void lcdif_reset_block(struct lcdif_drm_private *lcdif)
395 writel(CTRL_SW_RESET, lcdif->base + LCDC_V8_CTRL + REG_SET);
396 readl(lcdif->base + LCDC_V8_CTRL);
397 writel(CTRL_SW_RESET, lcdif->base + LCDC_V8_CTRL + REG_CLR);
398 readl(lcdif->base + LCDC_V8_CTRL);
406 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(drm);
411 (int)(clk_get_rate(lcdif->clk) / 1000));
417 lcdif_reset_block(lcdif);
419 lcdif_set_formats(lcdif, plane_state, lcdif_crtc_state->bus_format);
421 lcdif_set_mode(lcdif, lcdif_crtc_state->bus_flags);
508 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);
512 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
514 writel(reg, lcdif->base + LCDC_V8_CTRLDESCL0_5);
533 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);
537 struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;
538 struct drm_device *drm = lcdif->drm;
541 clk_set_rate(lcdif->clk, m->crtc_clock * 1000);
551 lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4);
553 lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);
555 lcdif_enable_controller(lcdif);
563 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);
564 struct drm_device *drm = lcdif->drm;
569 lcdif_disable_controller(lcdif);
626 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);
629 writel(INT_STATUS_D0_VS_BLANK, lcdif->base + LCDC_V8_INT_STATUS_D0);
630 writel(INT_ENABLE_D0_VS_BLANK_EN, lcdif->base + LCDC_V8_INT_ENABLE_D0);
637 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(crtc->dev);
640 writel(0, lcdif->base + LCDC_V8_INT_ENABLE_D0);
641 writel(INT_STATUS_D0_VS_BLANK, lcdif->base + LCDC_V8_INT_STATUS_D0);
671 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);
675 &lcdif->crtc);
686 struct lcdif_drm_private *lcdif = to_lcdif_drm_private(plane->dev);
694 lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4);
696 lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);
747 int lcdif_kms_init(struct lcdif_drm_private *lcdif)
754 struct drm_crtc *crtc = &lcdif->crtc;
757 drm_plane_helper_add(&lcdif->planes.primary,
759 ret = drm_universal_plane_init(lcdif->drm, &lcdif->planes.primary, 1,
768 ret = drm_plane_create_color_properties(&lcdif->planes.primary,
777 return drm_crtc_init_with_planes(lcdif->drm, crtc,
778 &lcdif->planes.primary, NULL,