Lines Matching defs:mode

56  * supported mode and thus cannot be determined from standard video timings.
821 union meson_hdmi_venc_mode *mode;
865 meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode)
867 if (mode->flags & ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
871 if (mode->hdisplay < 400 || mode->hdisplay > 1920)
874 if (mode->vdisplay < 480 || mode->vdisplay > 1920)
885 while (vmode->vic && vmode->mode) {
895 static void meson_venc_hdmi_get_dmt_vmode(const struct drm_display_mode *mode,
903 dmt_mode->encp.max_pxcnt = mode->htotal - 1;
904 dmt_mode->encp.havon_begin = mode->htotal - mode->hsync_start;
906 mode->hdisplay - 1;
907 dmt_mode->encp.vavon_bline = mode->vtotal - mode->vsync_start;
909 mode->vdisplay - 1;
911 dmt_mode->encp.hso_end = mode->hsync_end - mode->hsync_start;
915 dmt_mode->encp.vso_eline = mode->vsync_end - mode->vsync_start;
917 dmt_mode->encp.max_lncnt = mode->vtotal - 1;
924 while (vmode->vic && vmode->mode) {
926 return vmode->mode;
953 const struct drm_display_mode *mode)
986 if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
995 dev_err(priv->dev, "%s: Fatal Error, unsupported mode "
997 DRM_MODE_ARG(mode));
1001 meson_venc_hdmi_get_dmt_vmode(mode, &vmode_dmt);
1010 eof_lines = mode->vsync_start - mode->vdisplay;
1011 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1013 sof_lines = mode->vtotal - mode->vsync_end;
1014 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1016 vsync_lines = mode->vsync_end - mode->vsync_start;
1017 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1020 total_pixels_venc = mode->htotal;
1026 active_pixels_venc = mode->hdisplay;
1032 front_porch_venc = (mode->hsync_start - mode->hdisplay);
1038 hsync_pixels_venc = (mode->hsync_end - mode->hsync_start);
1086 /* Video mode */
1109 /* Sync mode : MASTER Master mode, free run, send HSO/VSO out */
1155 lines_f0 = mode->vtotal >> 1;
1172 de_v_end_even = de_v_begin_even + mode->vdisplay;
1175 de_v_end_odd = de_v_begin_odd + mode->vdisplay;
1420 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1422 (mode->vdisplay / 2);
1424 de_v_end_even = de_v_begin_even + mode->vdisplay;
1432 if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
1438 + ((mode->vtotal - 1) / 2);
1439 de_v_end_odd = de_v_begin_odd + (mode->vdisplay / 2);
1475 vs_bline_evn = mode->vtotal
1482 mode->vtotal);
1496 if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
1528 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
1532 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
1630 const struct drm_display_mode *mode)
1645 max_pxcnt = mode->htotal - 1;
1646 max_lncnt = mode->vtotal - 1;
1647 havon_begin = mode->htotal - mode->hsync_start;
1648 havon_end = havon_begin + mode->hdisplay - 1;
1649 vavon_bline = mode->vtotal - mode->vsync_start;
1650 vavon_eline = vavon_bline + mode->vdisplay - 1;
1652 hso_end = mode->hsync_end - mode->hsync_start;
1656 vso_eline = mode->vsync_end - mode->vsync_start;
1714 if (mode->flags & DRM_MODE_FLAG_PHSYNC) {
1727 if (mode->flags & DRM_MODE_FLAG_PVSYNC) {
1762 struct meson_cvbs_enci_mode *mode)
1766 if (mode->mode_tag == priv->venc.current_mode)
1784 writel_relaxed(mode->hso_begin,
1786 writel_relaxed(mode->hso_end,
1790 writel_relaxed(mode->vso_even,
1792 writel_relaxed(mode->vso_odd,
1797 ENCI_MACV_MAX_AMP_VAL(mode->macv_max_amp),
1800 /* Video mode */
1801 writel_relaxed(mode->video_prog_mode,
1803 writel_relaxed(mode->video_mode,
1820 writel(mode->sch_adjust, priv->io_base + _REG(ENCI_VIDEO_SCH));
1822 /* Sync mode : MASTER Master mode, free run, send HSO/VSO out */
1826 writel_relaxed(mode->yc_delay, priv->io_base + _REG(ENCI_YC_DELAY));
1829 writel_relaxed(mode->pixel_start,
1831 writel_relaxed(mode->pixel_end,
1834 writel_relaxed(mode->top_field_line_start,
1836 writel_relaxed(mode->top_field_line_end,
1839 writel_relaxed(mode->bottom_field_line_start,
1841 writel_relaxed(mode->bottom_field_line_end,
1919 writel_relaxed(mode->video_saturation,
1921 writel_relaxed(mode->video_contrast,
1923 writel_relaxed(mode->video_brightness,
1925 writel_relaxed(mode->video_hue,
1937 writel_relaxed(mode->analog_sync_adj,
1940 priv->venc.current_mode = mode->mode_tag;