Lines Matching refs:viu
366 priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1;
387 priv->viu.vpp_vsc_start_phase_step = ratio_y << 6;
389 priv->viu.vpp_vsc_ini_phase = vphase << 8;
390 priv->viu.vpp_vsc_phase_ctrl = (1 << 13) | (4 << 8) |
393 priv->viu.vd1_if0_luma_x0 = VD_X_START(hd_start_lines) |
395 priv->viu.vd1_if0_chroma_x0 = VD_X_START(hd_start_lines >> 1) |
398 priv->viu.viu_vd1_fmt_w =
402 priv->viu.vd1_afbc_vd_cfmt_w =
406 priv->viu.vd1_afbc_vd_cfmt_h =
409 priv->viu.vd1_afbc_mif_hor_scope = AFBC_MIF_BLK_BGN_H(afbc_left / 32) |
412 priv->viu.vd1_afbc_mif_ver_scope = AFBC_MIF_BLK_BGN_V(afbc_top / 4) |
415 priv->viu.vd1_afbc_size_out =
419 priv->viu.vd1_afbc_pixel_hor_scope =
423 priv->viu.vd1_afbc_pixel_ver_scope =
427 priv->viu.vd1_afbc_size_in =
431 priv->viu.vd1_if0_luma_y0 = VD_Y_START(vd_start_lines) |
434 priv->viu.vd1_if0_chroma_y0 = VD_Y_START(vd_start_lines >> 1) |
437 priv->viu.vpp_pic_in_height = h_in;
439 priv->viu.vpp_postblend_vd1_h_start_end = VD_H_START(hsc_startp) |
441 priv->viu.vpp_blend_vd2_h_start_end = VD_H_START(hd_start_lines) |
443 priv->viu.vpp_hsc_region12_startp = VD_REGION13_END(0) |
445 priv->viu.vpp_hsc_region34_startp =
448 priv->viu.vpp_hsc_region4_endp = hsc_endp - hsc_startp;
449 priv->viu.vpp_hsc_start_phase_step = ratio_x << 6;
450 priv->viu.vpp_hsc_region1_phase_slope = 0;
451 priv->viu.vpp_hsc_region3_phase_slope = 0;
452 priv->viu.vpp_hsc_phase_ctrl = (1 << 21) | (4 << 16);
454 priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1;
455 priv->viu.vpp_preblend_h_size = hd_end_lines - hd_start_lines + 1;
457 priv->viu.vpp_postblend_vd1_v_start_end = VD_V_START(vsc_startp) |
459 priv->viu.vpp_blend_vd2_v_start_end =
463 priv->viu.vpp_vsc_region12_startp = 0;
464 priv->viu.vpp_vsc_region34_startp =
467 priv->viu.vpp_vsc_region4_endp = vsc_endp - vsc_startp;
468 priv->viu.vpp_vsc_start_phase_step = ratio_y << 6;
491 priv->viu.vd1_afbc = true;
493 priv->viu.vd1_afbc_mode = AFBC_MIF_URGENT(3) |
499 priv->viu.vd1_afbc_mode |= AFBC_BLK_MEM_MODE;
503 priv->viu.vd1_afbc_mode |= AFBC_SCATTER_MODE;
505 priv->viu.vd1_afbc_en = 0x1600 | AFBC_DEC_ENABLE;
507 priv->viu.vd1_afbc_conv_ctrl = AFBC_CONV_LBUF_LEN(256);
509 priv->viu.vd1_afbc_dec_def_color = AFBC_DEF_COLOR_Y(1023);
512 priv->viu.vd1_afbc_vd_cfmt_ctrl = AFBC_HORZ_RPT_PIXEL0 |
523 priv->viu.vd1_afbc_mode |=
525 priv->viu.vd1_afbc_dec_def_color |=
530 priv->viu.vd1_afbc_dec_def_color |=
536 priv->viu.vd1_if0_gen_reg = 0;
537 priv->viu.vd1_if0_canvas0 = 0;
538 priv->viu.viu_vd1_fmt_ctrl = 0;
540 priv->viu.vd1_afbc = false;
542 priv->viu.vd1_if0_gen_reg = VD_URGENT_CHROMA |
552 priv->viu.vd1_if0_repeat_loop = 0;
553 priv->viu.vd1_if0_luma0_rpt_pat = interlace_mode ? 8 : 0;
554 priv->viu.vd1_if0_chroma0_rpt_pat = interlace_mode ? 8 : 0;
555 priv->viu.vd1_range_map_y = 0;
556 priv->viu.vd1_range_map_cb = 0;
557 priv->viu.vd1_range_map_cr = 0;
560 priv->viu.vd1_if0_gen_reg2 = 0;
561 priv->viu.viu_vd1_fmt_ctrl = 0;
567 priv->viu.vd1_if0_gen_reg |= VD_BYTES_PER_PIXEL(1);
568 priv->viu.vd1_if0_canvas0 =
572 priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */
581 priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN;
582 priv->viu.vd1_if0_canvas0 =
587 priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(1);
589 priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(2);
590 priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */
602 priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN;
603 priv->viu.vd1_if0_canvas0 =
609 priv->viu.viu_vd1_fmt_ctrl =
618 priv->viu.viu_vd1_fmt_ctrl =
627 priv->viu.viu_vd1_fmt_ctrl =
636 priv->viu.viu_vd1_fmt_ctrl =
649 priv->viu.vd1_planes = fb->format->num_planes;
651 switch (priv->viu.vd1_planes) {
654 priv->viu.vd1_addr2 = gem->dma_addr + fb->offsets[2];
655 priv->viu.vd1_stride2 = fb->pitches[2];
656 priv->viu.vd1_height2 =
660 priv->viu.vd1_addr2,
661 priv->viu.vd1_stride2,
662 priv->viu.vd1_height2);
666 priv->viu.vd1_addr1 = gem->dma_addr + fb->offsets[1];
667 priv->viu.vd1_stride1 = fb->pitches[1];
668 priv->viu.vd1_height1 =
672 priv->viu.vd1_addr1,
673 priv->viu.vd1_stride1,
674 priv->viu.vd1_height1);
678 priv->viu.vd1_addr0 = gem->dma_addr + fb->offsets[0];
679 priv->viu.vd1_stride0 = fb->pitches[0];
680 priv->viu.vd1_height0 =
684 priv->viu.vd1_addr0,
685 priv->viu.vd1_stride0,
686 priv->viu.vd1_height0);
689 if (priv->viu.vd1_afbc) {
690 if (priv->viu.vd1_afbc_mode & AFBC_SCATTER_MODE) {
696 priv->viu.vd1_afbc_head_addr = priv->viu.vd1_addr0 >> 4;
697 priv->viu.vd1_afbc_body_addr = 0;
704 if (priv->viu.vd1_afbc_mode & AFBC_BLK_MEM_MODE)
707 body_size = (ALIGN(priv->viu.vd1_stride0, 64) / 64) *
708 (ALIGN(priv->viu.vd1_height0, 32) / 32) *
711 priv->viu.vd1_afbc_body_addr = priv->viu.vd1_addr0 >> 4;
713 priv->viu.vd1_afbc_head_addr = (priv->viu.vd1_addr0 +
718 priv->viu.vd1_enabled = true;
733 priv->viu.vd1_enabled = false;