Lines Matching refs:dpi

120  * struct mtk_dpi_conf - Configuration of mediatek dpi.
129 * @support_direct_pin: IP supports direct connection to dpi panels.
161 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
163 u32 tmp = readl(dpi->regs + offset) & ~mask;
166 writel(tmp, dpi->regs + offset);
169 static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
171 mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
174 static void mtk_dpi_enable(struct mtk_dpi *dpi)
176 mtk_dpi_mask(dpi, DPI_EN, EN, EN);
179 static void mtk_dpi_disable(struct mtk_dpi *dpi)
181 mtk_dpi_mask(dpi, DPI_EN, 0, EN);
184 static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
187 mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH, sync->sync_width << HPW,
188 dpi->conf->dimension_mask << HPW);
189 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->back_porch << HBP,
190 dpi->conf->dimension_mask << HBP);
191 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
192 dpi->conf->dimension_mask << HFP);
195 static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
199 mtk_dpi_mask(dpi, width_addr,
202 mtk_dpi_mask(dpi, width_addr,
204 dpi->conf->dimension_mask << VSYNC_WIDTH_SHIFT);
205 mtk_dpi_mask(dpi, porch_addr,
207 dpi->conf->dimension_mask << VSYNC_BACK_PORCH_SHIFT);
208 mtk_dpi_mask(dpi, porch_addr,
210 dpi->conf->dimension_mask << VSYNC_FRONT_PORCH_SHIFT);
213 static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
216 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
219 static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
222 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
226 static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
229 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
233 static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
236 mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
240 static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
249 if (dpi->conf->is_ck_de_pol) {
257 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask);
260 static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
262 mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
265 static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
267 mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
270 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
272 mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE,
273 dpi->conf->hvsize_mask << HSIZE);
274 mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE,
275 dpi->conf->hvsize_mask << VSIZE);
278 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi)
282 if (drm_default_rgb_quant_range(&dpi->mode) ==
295 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_bottom << Y_LIMINT_BOT,
297 mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_top << Y_LIMINT_TOP,
299 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_bottom << C_LIMIT_BOT,
301 mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_top << C_LIMIT_TOP,
305 static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
327 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
331 static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
357 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
360 static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
389 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
390 val << dpi->conf->channel_swap_shift,
391 CH_SWAP_MASK << dpi->conf->channel_swap_shift);
394 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
396 mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->yuv422_en_bit : 0,
397 dpi->conf->yuv422_en_bit);
400 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
402 mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : 0,
403 dpi->conf->csc_enable_bit);
406 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
408 mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
411 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
413 mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
416 static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
418 if (dpi->conf->edge_sel_en)
419 mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
422 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
425 mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
428 mtk_dpi_config_yuv422_enable(dpi, true);
429 mtk_dpi_config_csc_enable(dpi, true);
435 mtk_dpi_mask(dpi, DPI_MATRIX_SET, dpi->mode.hdisplay <= 720 ?
439 mtk_dpi_config_yuv422_enable(dpi, false);
440 mtk_dpi_config_csc_enable(dpi, false);
441 if (dpi->conf->swap_input_support)
442 mtk_dpi_config_swap_input(dpi, false);
446 static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
448 if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
449 (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)) {
450 mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
452 mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
453 dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ?
455 if (dpi->conf->edge_cfg_in_mmsys)
456 mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_DDR_CON);
458 mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);
459 if (dpi->conf->edge_cfg_in_mmsys)
460 mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_SDR_CON);
464 static void mtk_dpi_power_off(struct mtk_dpi *dpi)
466 if (WARN_ON(dpi->refcount == 0))
469 if (--dpi->refcount != 0)
472 mtk_dpi_disable(dpi);
473 clk_disable_unprepare(dpi->pixel_clk);
474 clk_disable_unprepare(dpi->engine_clk);
477 static int mtk_dpi_power_on(struct mtk_dpi *dpi)
481 if (++dpi->refcount != 1)
484 ret = clk_prepare_enable(dpi->engine_clk);
486 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
490 ret = clk_prepare_enable(dpi->pixel_clk);
492 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
499 clk_disable_unprepare(dpi->engine_clk);
501 dpi->refcount--;
505 static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
519 factor = dpi->conf->cal_factor(mode->clock);
523 dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
526 clk_set_rate(dpi->tvd_clk, pll_rate);
527 pll_rate = clk_get_rate(dpi->tvd_clk);
535 vm.pixelclock /= dpi->conf->pixels_per_iter;
537 if ((dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
538 (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE))
539 clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
541 clk_set_rate(dpi->pixel_clk, vm.pixelclock);
544 vm.pixelclock = clk_get_rate(dpi->pixel_clk);
546 dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
561 hsync.sync_width = vm.hsync_len / dpi->conf->pixels_per_iter;
562 hsync.back_porch = vm.hback_porch / dpi->conf->pixels_per_iter;
563 hsync.front_porch = vm.hfront_porch / dpi->conf->pixels_per_iter;
586 mtk_dpi_sw_reset(dpi, true);
587 mtk_dpi_config_pol(dpi, &dpi_pol);
589 mtk_dpi_config_hsync(dpi, &hsync);
590 mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
591 mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
592 mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
593 mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
595 mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
596 mtk_dpi_config_interface(dpi, !!(vm.flags &
599 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1);
601 mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
603 mtk_dpi_config_channel_limit(dpi);
604 mtk_dpi_config_bit_num(dpi, dpi->bit_num);
605 mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
606 mtk_dpi_config_color_format(dpi, dpi->color_format);
607 if (dpi->conf->support_direct_pin) {
608 mtk_dpi_config_yc_map(dpi, dpi->yc_map);
609 mtk_dpi_config_2n_h_fre(dpi);
610 mtk_dpi_dual_edge(dpi);
611 mtk_dpi_config_disable_edge(dpi);
613 if (dpi->conf->input_2pixel) {
614 mtk_dpi_mask(dpi, DPI_CON, DPINTF_INPUT_2P_EN,
617 mtk_dpi_sw_reset(dpi, false);
628 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
633 if (!dpi->conf->output_fmts) {
634 dev_err(dpi->dev, "output_fmts should not be null\n");
638 output_fmts = kcalloc(dpi->conf->num_output_fmts, sizeof(*output_fmts),
643 *num_output_fmts = dpi->conf->num_output_fmts;
645 memcpy(output_fmts, dpi->conf->output_fmts,
646 sizeof(*output_fmts) * dpi->conf->num_output_fmts);
678 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
684 if (dpi->conf->num_output_fmts)
685 out_bus_format = dpi->conf->output_fmts[0];
687 dev_dbg(dpi->dev, "input format 0x%04x, output format 0x%04x\n",
691 dpi->output_fmt = out_bus_format;
692 dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
693 dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
694 dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
696 dpi->color_format = MTK_DPI_COLOR_FORMAT_YCBCR_422;
698 dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
706 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
708 return drm_bridge_attach(bridge->encoder, dpi->next_bridge,
709 &dpi->bridge, flags);
716 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
718 drm_mode_copy(&dpi->mode, adjusted_mode);
723 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
725 mtk_dpi_power_off(dpi);
727 if (dpi->pinctrl && dpi->pins_gpio)
728 pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
733 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
735 if (dpi->pinctrl && dpi->pins_dpi)
736 pinctrl_select_state(dpi->pinctrl, dpi->pins_dpi);
738 mtk_dpi_power_on(dpi);
739 mtk_dpi_set_display_mode(dpi, &dpi->mode);
740 mtk_dpi_enable(dpi);
748 struct mtk_dpi *dpi = bridge_to_dpi(bridge);
750 if (mode->clock > dpi->conf->max_clock_khz)
772 struct mtk_dpi *dpi = dev_get_drvdata(dev);
774 mtk_dpi_power_on(dpi);
779 struct mtk_dpi *dpi = dev_get_drvdata(dev);
781 mtk_dpi_power_off(dpi);
786 struct mtk_dpi *dpi = dev_get_drvdata(dev);
791 dpi->mmsys_dev = priv->mmsys_dev;
792 ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
799 dpi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->dev);
801 ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL,
806 dpi->connector = drm_bridge_connector_init(drm_dev, &dpi->encoder);
807 if (IS_ERR(dpi->connector)) {
809 ret = PTR_ERR(dpi->connector);
812 drm_connector_attach_encoder(dpi->connector, &dpi->encoder);
817 drm_encoder_cleanup(&dpi->encoder);
824 struct mtk_dpi *dpi = dev_get_drvdata(dev);
826 drm_encoder_cleanup(&dpi->encoder);
994 struct mtk_dpi *dpi;
997 dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
998 if (!dpi)
1001 dpi->dev = dev;
1002 dpi->conf = (struct mtk_dpi_conf *)of_device_get_match_data(dev);
1003 dpi->output_fmt = MEDIA_BUS_FMT_RGB888_1X24;
1005 dpi->pinctrl = devm_pinctrl_get(&pdev->dev);
1006 if (IS_ERR(dpi->pinctrl)) {
1007 dpi->pinctrl = NULL;
1010 if (dpi->pinctrl) {
1011 dpi->pins_gpio = pinctrl_lookup_state(dpi->pinctrl, "sleep");
1012 if (IS_ERR(dpi->pins_gpio)) {
1013 dpi->pins_gpio = NULL;
1016 if (dpi->pins_gpio)
1017 pinctrl_select_state(dpi->pinctrl, dpi->pins_gpio);
1019 dpi->pins_dpi = pinctrl_lookup_state(dpi->pinctrl, "default");
1020 if (IS_ERR(dpi->pins_dpi)) {
1021 dpi->pins_dpi = NULL;
1025 dpi->regs = devm_platform_ioremap_resource(pdev, 0);
1026 if (IS_ERR(dpi->regs))
1027 return dev_err_probe(dev, PTR_ERR(dpi->regs),
1030 dpi->engine_clk = devm_clk_get(dev, "engine");
1031 if (IS_ERR(dpi->engine_clk))
1032 return dev_err_probe(dev, PTR_ERR(dpi->engine_clk),
1035 dpi->pixel_clk = devm_clk_get(dev, "pixel");
1036 if (IS_ERR(dpi->pixel_clk))
1037 return dev_err_probe(dev, PTR_ERR(dpi->pixel_clk),
1040 dpi->tvd_clk = devm_clk_get(dev, "pll");
1041 if (IS_ERR(dpi->tvd_clk))
1042 return dev_err_probe(dev, PTR_ERR(dpi->tvd_clk),
1045 dpi->irq = platform_get_irq(pdev, 0);
1046 if (dpi->irq < 0)
1047 return dpi->irq;
1049 dpi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
1050 if (IS_ERR(dpi->next_bridge))
1051 return dev_err_probe(dev, PTR_ERR(dpi->next_bridge),
1054 dev_info(dev, "Found bridge node: %pOF\n", dpi->next_bridge->of_node);
1056 platform_set_drvdata(pdev, dpi);
1058 dpi->bridge.funcs = &mtk_dpi_bridge_funcs;
1059 dpi->bridge.of_node = dev->of_node;
1060 dpi->bridge.type = DRM_MODE_CONNECTOR_DPI;
1062 ret = devm_drm_bridge_add(dev, &dpi->bridge);
1079 { .compatible = "mediatek,mt2701-dpi", .data = &mt2701_conf },
1080 { .compatible = "mediatek,mt8173-dpi", .data = &mt8173_conf },
1081 { .compatible = "mediatek,mt8183-dpi", .data = &mt8183_conf },
1082 { .compatible = "mediatek,mt8186-dpi", .data = &mt8186_conf },
1084 { .compatible = "mediatek,mt8192-dpi", .data = &mt8192_conf },
1094 .name = "mediatek-dpi",