Lines Matching defs:kmb
29 static int kmb_display_clk_enable(struct kmb_drm_private *kmb)
33 ret = clk_prepare_enable(kmb->kmb_clk.clk_lcd);
35 drm_err(&kmb->drm, "Failed to enable LCD clock: %d\n", ret);
42 static int kmb_initialize_clocks(struct kmb_drm_private *kmb, struct device *dev)
47 kmb->kmb_clk.clk_lcd = devm_clk_get(dev, "clk_lcd");
48 if (IS_ERR(kmb->kmb_clk.clk_lcd)) {
49 drm_err(&kmb->drm, "clk_get() failed clk_lcd\n");
50 return PTR_ERR(kmb->kmb_clk.clk_lcd);
53 kmb->kmb_clk.clk_pll0 = devm_clk_get(dev, "clk_pll0");
54 if (IS_ERR(kmb->kmb_clk.clk_pll0)) {
55 drm_err(&kmb->drm, "clk_get() failed clk_pll0 ");
56 return PTR_ERR(kmb->kmb_clk.clk_pll0);
58 kmb->sys_clk_mhz = clk_get_rate(kmb->kmb_clk.clk_pll0) / 1000000;
59 drm_info(&kmb->drm, "system clk = %d Mhz", kmb->sys_clk_mhz);
61 ret = kmb_dsi_clk_init(kmb->kmb_dsi);
64 clk_set_rate(kmb->kmb_clk.clk_lcd, KMB_LCD_DEFAULT_CLK);
65 if (clk_get_rate(kmb->kmb_clk.clk_lcd) != KMB_LCD_DEFAULT_CLK) {
66 drm_err(&kmb->drm, "failed to set to clk_lcd to %d\n",
70 drm_dbg(&kmb->drm, "clk_lcd = %ld\n", clk_get_rate(kmb->kmb_clk.clk_lcd));
72 ret = kmb_display_clk_enable(kmb);
78 drm_err(&kmb->drm, "failed to get msscam syscon");
88 static void kmb_display_clk_disable(struct kmb_drm_private *kmb)
90 clk_disable_unprepare(kmb->kmb_clk.clk_lcd);
113 struct kmb_drm_private *kmb = to_kmb(drm);
119 kmb->lcd_mmio = kmb_map_mmio(drm, pdev, "lcd");
120 if (IS_ERR(kmb->lcd_mmio)) {
121 drm_err(&kmb->drm, "failed to map LCD registers\n");
126 ret = kmb_dsi_map_mmio(kmb->kmb_dsi);
131 kmb_initialize_clocks(kmb, &pdev->dev);
142 drm_err(&kmb->drm, "irq_lcd not found");
151 spin_lock_init(&kmb->irq_lock);
153 kmb->irq_lcd = irq_lcd;
172 struct kmb_drm_private *kmb = to_kmb(drm);
189 ret = kmb_dsi_encoder_init(drm, kmb->kmb_dsi);
191 kmb->crtc.port = of_graph_get_port_by_id(drm->dev->of_node, 0);
207 struct kmb_drm_private *kmb = to_kmb(dev);
210 status = kmb_read_lcd(kmb, LCD_INT_STATUS);
212 spin_lock(&kmb->irq_lock);
214 kmb_write_lcd(kmb, LCD_INT_CLEAR, LCD_INT_EOF);
224 if (kmb->plane_status[plane_id].disable) {
225 kmb_clr_bitmask_lcd(kmb,
230 kmb_clr_bitmask_lcd(kmb, LCD_CONTROL,
231 kmb->plane_status[plane_id].ctrl);
233 ctrl = kmb_read_lcd(kmb, LCD_CONTROL);
242 kmb_clr_bitmask_lcd(kmb, LCD_CONTROL,
246 kmb->plane_status[plane_id].disable = false;
249 if (kmb->kmb_under_flow) {
251 dma0_state = (kmb->layer_no == 0) ?
253 dma1_state = (kmb->layer_no == 0) ?
257 kmb_write_lcd(kmb, LCD_FIFO_FLUSH, 1);
258 val = kmb_read_lcd(kmb, dma0_state)
260 val1 = kmb_read_lcd(kmb, dma1_state)
264 kmb_clr_bitmask_lcd(kmb,
265 LCD_LAYERn_DMA_CFG(kmb->layer_no),
267 kmb_write_lcd(kmb, LCD_FIFO_FLUSH, 1);
268 kmb->kmb_flush_done = 1;
269 kmb->kmb_under_flow = 0;
275 kmb_write_lcd(kmb, LCD_INT_CLEAR, LCD_INT_LINE_CMP);
280 val = kmb_read_lcd(kmb, LCD_VSTATUS);
285 kmb_write_lcd(kmb, LCD_INT_CLEAR, LCD_INT_VERT_COMP);
286 if (kmb->kmb_flush_done) {
287 kmb_set_bitmask_lcd(kmb,
289 (kmb->layer_no),
291 kmb->kmb_flush_done = 0;
293 drm_crtc_handle_vblank(&kmb->crtc);
298 kmb_write_lcd(kmb, LCD_INT_CLEAR, LCD_INT_VERT_COMP);
305 kmb_read_lcd(kmb, LCD_INT_ENABLE));
310 kmb->kmb_under_flow++;
311 drm_info(&kmb->drm,
313 val, kmb->kmb_under_flow);
315 kmb_clr_bitmask_lcd(kmb, LCD_INT_ENABLE,
319 kmb_set_bitmask_lcd(kmb, LCD_INT_CLEAR,
324 kmb_clr_bitmask_lcd(kmb, LCD_LAYERn_DMA_CFG(0),
327 kmb->layer_no = 0;
331 drm_dbg(&kmb->drm,
334 drm_dbg(&kmb->drm,
337 drm_dbg(&kmb->drm,
344 kmb->kmb_under_flow++;
345 drm_info(&kmb->drm,
347 val, kmb->kmb_under_flow);
349 kmb_clr_bitmask_lcd(kmb, LCD_INT_ENABLE,
353 kmb_set_bitmask_lcd(kmb, LCD_INT_CLEAR,
358 kmb_clr_bitmask_lcd(kmb, LCD_LAYERn_DMA_CFG(1),
360 kmb->layer_no = 1;
365 drm_dbg(&kmb->drm,
368 drm_dbg(&kmb->drm,
371 drm_dbg(&kmb->drm,
376 drm_dbg(&kmb->drm,
379 drm_dbg(&kmb->drm,
384 drm_dbg(&kmb->drm,
387 drm_dbg(&kmb->drm,
391 spin_unlock(&kmb->irq_lock);
395 kmb_write_lcd(kmb, LCD_INT_CLEAR, LCD_INT_LAYER);
399 kmb_set_bitmask_lcd(kmb, LCD_INT_CLEAR, 1);
430 struct kmb_drm_private *kmb = to_kmb(drm);
433 free_irq(kmb->irq_lcd, drm);
444 .name = "kmb-drm",
455 struct kmb_drm_private *kmb = to_kmb(drm);
459 of_node_put(kmb->crtc.port);
460 kmb->crtc.port = NULL;
469 kmb_display_clk_disable(kmb);
474 kmb_dsi_host_unregister(kmb->kmb_dsi);
482 struct kmb_drm_private *kmb;
527 kmb = devm_drm_dev_alloc(dev, &kmb_driver,
529 if (IS_ERR(kmb))
530 return PTR_ERR(kmb);
532 dev_set_drvdata(dev, &kmb->drm);
535 kmb->kmb_dsi = kmb_dsi_init(dsi_pdev);
536 if (IS_ERR(kmb->kmb_dsi)) {
537 drm_err(&kmb->drm, "failed to initialize DSI\n");
538 ret = PTR_ERR(kmb->kmb_dsi);
542 kmb->kmb_dsi->dev = &dsi_pdev->dev;
543 kmb->kmb_dsi->pdev = dsi_pdev;
544 ret = kmb_hw_init(&kmb->drm, 0);
548 ret = kmb_setup_mode_config(&kmb->drm);
552 ret = kmb_irq_install(&kmb->drm, kmb->irq_lcd);
554 drm_err(&kmb->drm, "failed to install IRQ handler\n");
558 drm_kms_helper_poll_init(&kmb->drm);
561 ret = drm_dev_register(&kmb->drm, 0);
565 drm_fbdev_dma_setup(&kmb->drm, 0);
570 drm_kms_helper_poll_fini(&kmb->drm);
572 pm_runtime_disable(kmb->drm.dev);
574 drm_crtc_cleanup(&kmb->crtc);
575 drm_mode_config_cleanup(&kmb->drm);
578 kmb_dsi_host_unregister(kmb->kmb_dsi);
593 struct kmb_drm_private *kmb = to_kmb(drm);
597 kmb->state = drm_atomic_helper_suspend(drm);
598 if (IS_ERR(kmb->state)) {
600 return PTR_ERR(kmb->state);
609 struct kmb_drm_private *kmb = drm ? to_kmb(drm) : NULL;
611 if (!kmb)
614 drm_atomic_helper_resume(drm, kmb->state);
626 .name = "kmb-drm",