Lines Matching defs:fence
25 #include <linux/dma-fence-array.h>
26 #include <linux/dma-fence-chain.h>
54 struct i915_sw_fence *fence;
61 static const char *i915_fence_get_driver_name(struct dma_fence *fence)
63 return dev_name(to_request(fence)->i915->drm.dev);
66 static const char *i915_fence_get_timeline_name(struct dma_fence *fence)
79 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
82 ctx = i915_request_gem_context(to_request(fence));
89 static bool i915_fence_signaled(struct dma_fence *fence)
91 return i915_request_completed(to_request(fence));
94 static bool i915_fence_enable_signaling(struct dma_fence *fence)
96 return i915_request_enable_breadcrumb(to_request(fence));
99 static signed long i915_fence_wait(struct dma_fence *fence,
103 return i915_request_wait_timeout(to_request(fence),
113 static void i915_fence_release(struct dma_fence *fence)
115 struct i915_request *rq = to_request(fence);
187 i915_sw_fence_complete(cb->fence);
388 dma_fence_signal_locked(&rq->fence);
392 if (test_and_set_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags))
491 inflight = i915_seqno_passed(rq->fence.seqno,
492 signal->fence.seqno);
515 cb->fence = &rq->submit;
516 i915_sw_fence_await(cb->fence);
555 GEM_BUG_ON(!fatal_error(rq->fence.error));
560 RQ_TRACE(rq, "error: %d\n", rq->fence.error);
565 * breadcrumb at the end (so we get the fence notifications).
580 old = READ_ONCE(rq->fence.error);
584 } while (!try_cmpxchg(&rq->fence.error, &old, error));
639 if (unlikely(fatal_error(request->fence.error)))
673 GEM_BUG_ON(test_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags));
676 clear_bit(I915_FENCE_FLAG_PQUEUE, &request->fence.flags);
677 set_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags);
685 * quite hairy, we have to carefully rollback the fence and do a
691 /* We may be recursing from the signal callback of another i915 fence */
692 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags))
731 GEM_BUG_ON(!test_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags));
732 clear_bit_unlock(I915_FENCE_FLAG_ACTIVE, &request->fence.flags);
733 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags))
767 set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);
773 submit_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
776 container_of(fence, typeof(*request), submit);
782 if (unlikely(fence->error))
783 i915_request_set_error_once(request, fence->error);
809 semaphore_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
811 struct i915_request *rq = container_of(fence, typeof(*rq), semaphore);
956 dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock,
967 /* We bump the ref for the fence chain */
1062 struct dma_fence *fence;
1079 fence = NULL;
1109 fence = &prev->fence;
1112 if (!fence)
1116 if (!intel_timeline_sync_is_later(i915_request_timeline(rq), fence))
1118 fence, 0,
1120 dma_fence_put(fence);
1218 * If this or its dependents are waiting on an external fence
1220 * semaphores as they bypass the fence signaling metadata, and we
1221 * lose the fence->error propagation.
1237 if (__emit_semaphore_wait(to, from, from->fence.seqno))
1245 &from->fence, 0,
1250 struct dma_fence *fence)
1253 fence->context,
1254 fence->seqno - 1);
1258 const struct dma_fence *fence)
1260 return __intel_timeline_sync_set(tl, fence->context, fence->seqno - 1);
1278 &from->fence))
1309 * (with just an ordinary intra-engine fence dependency between the
1317 err = __emit_semaphore_wait(to, from, from->fence.seqno - 1);
1322 /* Couple the dependency tree for PI on this exposed to->fence */
1332 &from->fence);
1349 __i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
1352 return i915_sw_fence_await_dma_fence(&rq->submit, fence,
1354 fence->context),
1359 i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
1364 if (!to_dma_fence_chain(fence))
1365 return __i915_request_await_external(rq, fence);
1367 dma_fence_chain_for_each(iter, fence) {
1370 if (!dma_fence_is_i915(chain->fence)) {
1375 err = i915_request_await_dma_fence(rq, chain->fence);
1405 struct dma_fence *fence)
1407 struct dma_fence **child = &fence;
1411 if (dma_fence_is_array(fence)) {
1412 struct dma_fence_array *array = to_dma_fence_array(fence);
1414 /* XXX Error for signal-on-any fence arrays */
1422 fence = *child++;
1423 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
1426 if (fence->context == rq->fence.context)
1430 * We don't squash repeated fence dependencies here as we
1434 if (dma_fence_is_i915(fence)) {
1435 if (is_same_parallel_context(rq, to_request(fence)))
1438 to_request(fence));
1440 ret = i915_request_await_external(rq, fence);
1477 i915_sw_fence_set_error_once(&to->submit, from->fence.error);
1501 i915_request_await_dma_fence(struct i915_request *rq, struct dma_fence *fence)
1503 struct dma_fence **child = &fence;
1508 * Note that if the fence-array was created in signal-on-any mode,
1510 * we don't currently store which mode the fence-array is operating
1512 * amdgpu and we should not see any incoming fence-array from
1515 if (dma_fence_is_array(fence)) {
1516 struct dma_fence_array *array = to_dma_fence_array(fence);
1524 fence = *child++;
1525 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
1533 if (fence->context == rq->fence.context)
1537 if (fence->context &&
1539 fence))
1542 if (dma_fence_is_i915(fence)) {
1543 if (is_same_parallel_context(rq, to_request(fence)))
1545 ret = i915_request_await_request(rq, to_request(fence));
1547 ret = i915_request_await_external(rq, fence);
1552 /* Record the latest fence used against each timeline */
1553 if (fence->context)
1555 fence);
1608 struct dma_fence *fence;
1612 dma_resv_usage_rw(write), fence) {
1613 ret = i915_request_await_dma_fence(to, fence);
1631 &huc->delayed_load.fence,
1667 &rq->fence));
1679 &rq->fence));
1694 i915_seqno_passed(prev->fence.seqno,
1695 rq->fence.seqno));
1703 &prev->fence,
1749 * If we consider the case of virtual engine, we must emit a dma-fence
1760 * relationship in the gem context and insert a submission fence
1762 * alternatively we use completion fence if gem context has a single
1777 GEM_BUG_ON(timeline->seqno != rq->fence.seqno);
1935 if (dma_fence_is_signaled(&rq->fence))
1955 static void request_wait_wake(struct dma_fence *fence, struct dma_fence_cb *cb)
1974 * If the timeout is 0, it will return 1 if the fence is signaled.
1979 * NOTE: This function has the same wait semantics as dma-fence.
1992 if (dma_fence_is_signaled(&rq->fence))
2051 if (dma_fence_add_callback(&rq->fence, &wait.cb, request_wait_wake))
2075 if (dma_fence_is_signaled(&rq->fence))
2093 dma_fence_remove_callback(&rq->fence, &wait.cb);
2117 * NOTE: This function behaves differently from dma-fence wait semantics for
2174 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags))
2177 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &rq->fence.flags))
2188 const char *name = rq->fence.ops->get_timeline_name((struct dma_fence *)&rq->fence);
2227 rq->fence.context, rq->fence.seqno,