Lines Matching refs:reg
552 #define _BXT_PHY(phy, reg) \
553 _MMIO(BXT_PHY_BASE(phy) - _BXT_PHY0_BASE + (reg))
960 /* the FWSTS regs are 1-based, so we use -base for index 0 to get an invalid reg */
3552 #define _MMIO_CHV_SPCSC(plane_id, reg) \
3553 _MMIO(VLV_DISPLAY_BASE + ((plane_id) - PLANE_SPRITE0) * 0x1000 + (reg))
5461 #define GEN7_PARITY_ERROR_ROW(reg) \
5462 (((reg) & GEN7_L3CDERRST1_ROW_MASK) >> 14)
5463 #define GEN7_PARITY_ERROR_BANK(reg) \
5464 (((reg) & GEN7_L3CDERRST1_BANK_MASK) >> 11)
5465 #define GEN7_PARITY_ERROR_SUBBANK(reg) \
5466 (((reg) & GEN7_L3CDERRST1_SUBBANK_MASK) >> 8)