Lines Matching refs:i915
73 /* Data Stolen Memory (DSM) aka "i915 stolen memory" */
203 /* i915 device parameters */
266 * scheduling within i915, which used to be scheduled on the
324 * i915->gt[0] == &i915->gt0
385 static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
387 return &i915->gt0;
417 #define INTEL_INFO(i915) ((i915)->__info)
418 #define RUNTIME_INFO(i915) (&(i915)->__runtime)
419 #define DISPLAY_INFO(i915) ((i915)->display.info.__device_info)
420 #define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info)
421 #define DRIVER_CAPS(i915) (&(i915)->caps)
423 #define INTEL_DEVID(i915) (RUNTIME_INFO(i915)->device_id)
427 #define GRAPHICS_VER(i915) (RUNTIME_INFO(i915)->graphics.ip.ver)
428 #define GRAPHICS_VER_FULL(i915) IP_VER(RUNTIME_INFO(i915)->graphics.ip.ver, \
429 RUNTIME_INFO(i915)->graphics.ip.rel)
430 #define IS_GRAPHICS_VER(i915, from, until) \
431 (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
433 #define MEDIA_VER(i915) (RUNTIME_INFO(i915)->media.ip.ver)
434 #define MEDIA_VER_FULL(i915) IP_VER(RUNTIME_INFO(i915)->media.ip.ver, \
435 RUNTIME_INFO(i915)->media.ip.rel)
436 #define IS_MEDIA_VER(i915, from, until) \
437 (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until))
439 #define DISPLAY_VER(i915) (DISPLAY_RUNTIME_INFO(i915)->ip.ver)
440 #define IS_DISPLAY_VER(i915, from, until) \
441 (DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
443 #define INTEL_REVID(i915) (to_pci_dev((i915)->drm.dev)->revision)
499 IS_PLATFORM(const struct drm_i915_private *i915, enum intel_platform p)
501 const struct intel_runtime_info *info = RUNTIME_INFO(i915);
511 IS_SUBPLATFORM(const struct drm_i915_private *i915,
514 const struct intel_runtime_info *info = RUNTIME_INFO(i915);
528 #define IS_MOBILE(i915) (INTEL_INFO(i915)->is_mobile)
529 #define IS_DGFX(i915) (INTEL_INFO(i915)->is_dgfx)
531 #define IS_I830(i915) IS_PLATFORM(i915, INTEL_I830)
532 #define IS_I845G(i915) IS_PLATFORM(i915, INTEL_I845G)
533 #define IS_I85X(i915) IS_PLATFORM(i915, INTEL_I85X)
534 #define IS_I865G(i915) IS_PLATFORM(i915, INTEL_I865G)
535 #define IS_I915G(i915) IS_PLATFORM(i915, INTEL_I915G)
536 #define IS_I915GM(i915) IS_PLATFORM(i915, INTEL_I915GM)
537 #define IS_I945G(i915) IS_PLATFORM(i915, INTEL_I945G)
538 #define IS_I945GM(i915) IS_PLATFORM(i915, INTEL_I945GM)
539 #define IS_I965G(i915) IS_PLATFORM(i915, INTEL_I965G)
540 #define IS_I965GM(i915) IS_PLATFORM(i915, INTEL_I965GM)
541 #define IS_G45(i915) IS_PLATFORM(i915, INTEL_G45)
542 #define IS_GM45(i915) IS_PLATFORM(i915, INTEL_GM45)
543 #define IS_G4X(i915) (IS_G45(i915) || IS_GM45(i915))
544 #define IS_PINEVIEW(i915) IS_PLATFORM(i915, INTEL_PINEVIEW)
545 #define IS_G33(i915) IS_PLATFORM(i915, INTEL_G33)
546 #define IS_IRONLAKE(i915) IS_PLATFORM(i915, INTEL_IRONLAKE)
547 #define IS_IRONLAKE_M(i915) \
548 (IS_PLATFORM(i915, INTEL_IRONLAKE) && IS_MOBILE(i915))
549 #define IS_SANDYBRIDGE(i915) IS_PLATFORM(i915, INTEL_SANDYBRIDGE)
550 #define IS_IVYBRIDGE(i915) IS_PLATFORM(i915, INTEL_IVYBRIDGE)
551 #define IS_IVB_GT1(i915) (IS_IVYBRIDGE(i915) && \
552 INTEL_INFO(i915)->gt == 1)
553 #define IS_VALLEYVIEW(i915) IS_PLATFORM(i915, INTEL_VALLEYVIEW)
554 #define IS_CHERRYVIEW(i915) IS_PLATFORM(i915, INTEL_CHERRYVIEW)
555 #define IS_HASWELL(i915) IS_PLATFORM(i915, INTEL_HASWELL)
556 #define IS_BROADWELL(i915) IS_PLATFORM(i915, INTEL_BROADWELL)
557 #define IS_SKYLAKE(i915) IS_PLATFORM(i915, INTEL_SKYLAKE)
558 #define IS_BROXTON(i915) IS_PLATFORM(i915, INTEL_BROXTON)
559 #define IS_KABYLAKE(i915) IS_PLATFORM(i915, INTEL_KABYLAKE)
560 #define IS_GEMINILAKE(i915) IS_PLATFORM(i915, INTEL_GEMINILAKE)
561 #define IS_COFFEELAKE(i915) IS_PLATFORM(i915, INTEL_COFFEELAKE)
562 #define IS_COMETLAKE(i915) IS_PLATFORM(i915, INTEL_COMETLAKE)
563 #define IS_ICELAKE(i915) IS_PLATFORM(i915, INTEL_ICELAKE)
564 #define IS_JASPERLAKE(i915) IS_PLATFORM(i915, INTEL_JASPERLAKE)
565 #define IS_ELKHARTLAKE(i915) IS_PLATFORM(i915, INTEL_ELKHARTLAKE)
566 #define IS_TIGERLAKE(i915) IS_PLATFORM(i915, INTEL_TIGERLAKE)
567 #define IS_ROCKETLAKE(i915) IS_PLATFORM(i915, INTEL_ROCKETLAKE)
568 #define IS_DG1(i915) IS_PLATFORM(i915, INTEL_DG1)
569 #define IS_ALDERLAKE_S(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_S)
570 #define IS_ALDERLAKE_P(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_P)
571 #define IS_XEHPSDV(i915) IS_PLATFORM(i915, INTEL_XEHPSDV)
572 #define IS_DG2(i915) IS_PLATFORM(i915, INTEL_DG2)
573 #define IS_PONTEVECCHIO(i915) IS_PLATFORM(i915, INTEL_PONTEVECCHIO)
574 #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)
576 #define IS_METEORLAKE_M(i915) \
577 IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
578 #define IS_METEORLAKE_P(i915) \
579 IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
580 #define IS_DG2_G10(i915) \
581 IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
582 #define IS_DG2_G11(i915) \
583 IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11)
584 #define IS_DG2_G12(i915) \
585 IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12)
586 #define IS_RAPTORLAKE_S(i915) \
587 IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
588 #define IS_ALDERLAKE_P_N(i915) \
589 IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
590 #define IS_RAPTORLAKE_P(i915) \
591 IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
592 #define IS_RAPTORLAKE_U(i915) \
593 IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
594 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
595 (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
596 #define IS_BROADWELL_ULT(i915) \
597 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
598 #define IS_BROADWELL_ULX(i915) \
599 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
600 #define IS_BROADWELL_GT3(i915) (IS_BROADWELL(i915) && \
601 INTEL_INFO(i915)->gt == 3)
602 #define IS_HASWELL_ULT(i915) \
603 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
604 #define IS_HASWELL_GT3(i915) (IS_HASWELL(i915) && \
605 INTEL_INFO(i915)->gt == 3)
606 #define IS_HASWELL_GT1(i915) (IS_HASWELL(i915) && \
607 INTEL_INFO(i915)->gt == 1)
609 #define IS_HASWELL_ULX(i915) \
610 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
611 #define IS_SKYLAKE_ULT(i915) \
612 IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
613 #define IS_SKYLAKE_ULX(i915) \
614 IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX)
615 #define IS_KABYLAKE_ULT(i915) \
616 IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
617 #define IS_KABYLAKE_ULX(i915) \
618 IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
619 #define IS_SKYLAKE_GT2(i915) (IS_SKYLAKE(i915) && \
620 INTEL_INFO(i915)->gt == 2)
621 #define IS_SKYLAKE_GT3(i915) (IS_SKYLAKE(i915) && \
622 INTEL_INFO(i915)->gt == 3)
623 #define IS_SKYLAKE_GT4(i915) (IS_SKYLAKE(i915) && \
624 INTEL_INFO(i915)->gt == 4)
625 #define IS_KABYLAKE_GT2(i915) (IS_KABYLAKE(i915) && \
626 INTEL_INFO(i915)->gt == 2)
627 #define IS_KABYLAKE_GT3(i915) (IS_KABYLAKE(i915) && \
628 INTEL_INFO(i915)->gt == 3)
629 #define IS_COFFEELAKE_ULT(i915) \
630 IS_SUBPLATFORM(i915, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULT)
631 #define IS_COFFEELAKE_ULX(i915) \
632 IS_SUBPLATFORM(i915, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULX)
633 #define IS_COFFEELAKE_GT2(i915) (IS_COFFEELAKE(i915) && \
634 INTEL_INFO(i915)->gt == 2)
635 #define IS_COFFEELAKE_GT3(i915) (IS_COFFEELAKE(i915) && \
636 INTEL_INFO(i915)->gt == 3)
638 #define IS_COMETLAKE_ULT(i915) \
639 IS_SUBPLATFORM(i915, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULT)
640 #define IS_COMETLAKE_ULX(i915) \
641 IS_SUBPLATFORM(i915, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULX)
642 #define IS_COMETLAKE_GT2(i915) (IS_COMETLAKE(i915) && \
643 INTEL_INFO(i915)->gt == 2)
645 #define IS_ICL_WITH_PORT_F(i915) \
646 IS_SUBPLATFORM(i915, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
648 #define IS_TIGERLAKE_UY(i915) \
649 IS_SUBPLATFORM(i915, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)
704 #define IS_LP(i915) (INTEL_INFO(i915)->is_lp)
705 #define IS_GEN9_LP(i915) (GRAPHICS_VER(i915) == 9 && IS_LP(i915))
706 #define IS_GEN9_BC(i915) (GRAPHICS_VER(i915) == 9 && !IS_LP(i915))
731 #define HAS_MEDIA_RATIO_MODE(i915) (INTEL_INFO(i915)->has_media_ratio_mode)
737 #define CMDPARSER_USES_GGTT(i915) (GRAPHICS_VER(i915) == 7)
739 #define HAS_LLC(i915) (INTEL_INFO(i915)->has_llc)
740 #define HAS_4TILE(i915) (INTEL_INFO(i915)->has_4tile)
741 #define HAS_SNOOP(i915) (INTEL_INFO(i915)->has_snoop)
742 #define HAS_EDRAM(i915) ((i915)->edram_size_mb)
743 #define HAS_SECURE_BATCHES(i915) (GRAPHICS_VER(i915) < 6)
744 #define HAS_WT(i915) HAS_EDRAM(i915)
746 #define HWS_NEEDS_PHYSICAL(i915) (INTEL_INFO(i915)->hws_needs_physical)
748 #define HAS_LOGICAL_RING_CONTEXTS(i915) \
749 (INTEL_INFO(i915)->has_logical_ring_contexts)
750 #define HAS_LOGICAL_RING_ELSQ(i915) \
751 (INTEL_INFO(i915)->has_logical_ring_elsq)
753 #define HAS_EXECLISTS(i915) HAS_LOGICAL_RING_CONTEXTS(i915)
755 #define INTEL_PPGTT(i915) (RUNTIME_INFO(i915)->ppgtt_type)
756 #define HAS_PPGTT(i915) \
757 (INTEL_PPGTT(i915) != INTEL_PPGTT_NONE)
758 #define HAS_FULL_PPGTT(i915) \
759 (INTEL_PPGTT(i915) >= INTEL_PPGTT_FULL)
761 #define HAS_PAGE_SIZES(i915, sizes) ({ \
763 ((sizes) & ~RUNTIME_INFO(i915)->page_sizes) == 0; \
767 #define HAS_BROKEN_CS_TLB(i915) (IS_I830(i915) || IS_I845G(i915))
769 #define NEEDS_RC6_CTX_CORRUPTION_WA(i915) \
770 (IS_BROADWELL(i915) || GRAPHICS_VER(i915) == 9)
773 #define NEEDS_WaRsDisableCoarsePowerGating(i915) \
774 (IS_SKYLAKE_GT3(i915) || IS_SKYLAKE_GT4(i915))
779 #define HAS_128_BYTE_Y_TILING(i915) (GRAPHICS_VER(i915) != 2 && \
780 !(IS_I915G(i915) || IS_I915GM(i915)))
782 #define HAS_RC6(i915) (INTEL_INFO(i915)->has_rc6)
783 #define HAS_RC6p(i915) (INTEL_INFO(i915)->has_rc6p)
784 #define HAS_RC6pp(i915) (false) /* HW was never validated */
786 #define HAS_RPS(i915) (INTEL_INFO(i915)->has_rps)
788 #define HAS_HECI_PXP(i915) \
789 (INTEL_INFO(i915)->has_heci_pxp)
791 #define HAS_HECI_GSCFI(i915) \
792 (INTEL_INFO(i915)->has_heci_gscfi)
794 #define HAS_HECI_GSC(i915) (HAS_HECI_PXP(i915) || HAS_HECI_GSCFI(i915))
796 #define HAS_RUNTIME_PM(i915) (INTEL_INFO(i915)->has_runtime_pm)
797 #define HAS_64BIT_RELOC(i915) (INTEL_INFO(i915)->has_64bit_reloc)
799 #define HAS_OA_BPC_REPORTING(i915) \
800 (INTEL_INFO(i915)->has_oa_bpc_reporting)
801 #define HAS_OA_SLICE_CONTRIB_LIMITS(i915) \
802 (INTEL_INFO(i915)->has_oa_slice_contrib_limits)
803 #define HAS_OAM(i915) \
804 (INTEL_INFO(i915)->has_oam)
810 #define HAS_64K_PAGES(i915) (INTEL_INFO(i915)->has_64k_pages)
812 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
813 #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
815 #define HAS_EXTRA_GT_LIST(i915) (INTEL_INFO(i915)->extra_gt_list)
821 #define HAS_FLAT_CCS(i915) (INTEL_INFO(i915)->has_flat_ccs)
823 #define HAS_GT_UC(i915) (INTEL_INFO(i915)->has_gt_uc)
825 #define HAS_POOLED_EU(i915) (RUNTIME_INFO(i915)->has_pooled_eu)
827 #define HAS_GLOBAL_MOCS_REGISTERS(i915) (INTEL_INFO(i915)->has_global_mocs)
829 #define HAS_GMD_ID(i915) (INTEL_INFO(i915)->has_gmd_id)
831 #define HAS_L3_CCS_READ(i915) (INTEL_INFO(i915)->has_l3_ccs_read)
834 #define HAS_L3_DPF(i915) (INTEL_INFO(i915)->has_l3_dpf)
835 #define NUM_L3_SLICES(i915) (IS_HASWELL_GT3(i915) ? \
836 2 : HAS_L3_DPF(i915))
839 #define INTEL_DISPLAY_ENABLED(i915) \
840 (drm_WARN_ON(&(i915)->drm, !HAS_DISPLAY(i915)), \
841 !(i915)->params.disable_display && \
842 !intel_opregion_headless_sku(i915))
844 #define HAS_GUC_DEPRIVILEGE(i915) \
845 (INTEL_INFO(i915)->has_guc_deprivilege)
847 #define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline)
849 #define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
851 #define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
852 GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))