Lines Matching refs:gvt
38 #include "gvt.h"
57 #define reg_is_mmio(gvt, reg) \
58 (reg >= 0 && reg < gvt->device_info.mmio_size)
60 #define reg_is_gtt(gvt, reg) \
61 (reg >= gvt->device_info.gtt_start_offset \
62 && reg < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt))
67 struct intel_gvt *gvt = NULL;
74 gvt = vgpu->gvt;
77 if (reg_is_mmio(gvt, offset)) {
84 } else if (reg_is_gtt(gvt, offset)) {
85 offset -= gvt->device_info.gtt_start_offset;
109 struct intel_gvt *gvt = vgpu->gvt;
110 struct drm_i915_private *i915 = gvt->gt->i915;
125 if (reg_is_gtt(gvt, offset)) {
132 !reg_is_gtt(gvt, offset + bytes - 1)))
142 if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {
147 if (drm_WARN_ON(&i915->drm, !reg_is_mmio(gvt, offset + bytes - 1)))
150 if (!intel_gvt_mmio_is_unalign(gvt, offset)) {
159 intel_gvt_mmio_set_accessed(gvt, offset);
184 struct intel_gvt *gvt = vgpu->gvt;
185 struct drm_i915_private *i915 = gvt->gt->i915;
201 if (reg_is_gtt(gvt, offset)) {
208 !reg_is_gtt(gvt, offset + bytes - 1)))
218 if (drm_WARN_ON_ONCE(&i915->drm, !reg_is_mmio(gvt, offset))) {
227 intel_gvt_mmio_set_accessed(gvt, offset);
246 struct intel_gvt *gvt = vgpu->gvt;
247 const struct intel_gvt_device_info *info = &gvt->device_info;
248 void *mmio = gvt->firmware.mmio;
261 if (IS_BROXTON(vgpu->gvt->gt->i915)) {
313 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;