Lines Matching refs:bytes
88 void *p_data, unsigned int bytes)
90 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes);
94 void *p_data, unsigned int bytes)
96 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes);
193 unsigned int fence_num, void *p_data, unsigned int bytes)
209 memset(p_data, 0, bytes);
216 unsigned int offset, void *p_data, unsigned int bytes)
236 write_vreg(vgpu, offset, p_data, bytes);
241 void *p_data, unsigned int bytes)
246 p_data, bytes);
249 read_vreg(vgpu, off, p_data, bytes);
254 void *p_data, unsigned int bytes)
260 ret = sanitize_fence_mmio_access(vgpu, fence_num, p_data, bytes);
263 write_vreg(vgpu, off, p_data, bytes);
278 unsigned int offset, void *p_data, unsigned int bytes)
312 void *p_data, unsigned int bytes)
317 write_vreg(vgpu, offset, p_data, bytes);
361 void *p_data, unsigned int bytes)
363 return intel_gvt_i2c_handle_gmbus_read(vgpu, offset, p_data, bytes);
367 void *p_data, unsigned int bytes)
369 return intel_gvt_i2c_handle_gmbus_write(vgpu, offset, p_data, bytes);
373 unsigned int offset, void *p_data, unsigned int bytes)
375 write_vreg(vgpu, offset, p_data, bytes);
391 unsigned int offset, void *p_data, unsigned int bytes)
393 write_vreg(vgpu, offset, p_data, bytes);
403 void *p_data, unsigned int bytes)
405 write_vreg(vgpu, offset, p_data, bytes);
421 void *p_data, unsigned int bytes)
440 read_vreg(vgpu, offset, p_data, bytes);
698 void *p_data, unsigned int bytes)
702 write_vreg(vgpu, offset, p_data, bytes);
771 unsigned int offset, void *p_data, unsigned int bytes)
777 if (bytes != 4 || !IS_ALIGNED(offset, bytes) || !engine) {
779 vgpu->id, offset, bytes);
788 intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);
794 void *p_data, unsigned int bytes)
796 write_vreg(vgpu, offset, p_data, bytes);
810 unsigned int offset, void *p_data, unsigned int bytes)
901 unsigned int offset, void *p_data, unsigned int bytes)
918 write_vreg(vgpu, offset, p_data, bytes);
945 void *p_data, unsigned int bytes)
951 write_vreg(vgpu, offset, p_data, bytes);
963 unsigned int offset, void *p_data, unsigned int bytes)
978 unsigned int offset, void *p_data, unsigned int bytes)
982 write_vreg(vgpu, offset, p_data, bytes);
991 unsigned int offset, void *p_data, unsigned int bytes)
995 write_vreg(vgpu, offset, p_data, bytes);
1009 void *p_data, unsigned int bytes)
1015 write_vreg(vgpu, offset, p_data, bytes);
1032 void *p_data, unsigned int bytes)
1037 write_vreg(vgpu, offset, p_data, bytes);
1050 unsigned int bytes)
1057 write_vreg(vgpu, offset, p_data, bytes);
1162 unsigned int offset, void *p_data, unsigned int bytes)
1176 write_vreg(vgpu, offset, p_data, bytes);
1226 * 4 bytes, followed by (len + 1) bytes of data. See details at
1294 * Read reply format: ACK (1 byte) plus (len + 1) bytes of data.
1302 /* first 4 bytes: [ACK][addr][addr+1][addr+2] */
1332 void *p_data, unsigned int bytes)
1335 write_vreg(vgpu, offset, p_data, bytes);
1340 void *p_data, unsigned int bytes)
1344 write_vreg(vgpu, offset, p_data, bytes);
1394 void *p_data, unsigned int bytes)
1403 read_vreg(vgpu, offset, p_data, bytes);
1408 void *p_data, unsigned int bytes)
1412 write_vreg(vgpu, offset, p_data, bytes);
1438 void *p_data, unsigned int bytes)
1442 read_vreg(vgpu, offset, p_data, bytes);
1446 if (offset + bytes > _vgtif_reg(vgt_id) + 4)
1451 if (offset + bytes >
1464 offset, bytes, *(u32 *)p_data);
1514 void *p_data, unsigned int bytes)
1546 gvt_vgpu_err("invalid pvinfo write offset %x bytes %x data %x\n",
1547 offset, bytes, data);
1552 write_vreg(vgpu, offset, p_data, bytes);
1558 unsigned int offset, void *p_data, unsigned int bytes)
1572 return intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);
1576 unsigned int offset, void *p_data, unsigned int bytes)
1578 write_vreg(vgpu, offset, p_data, bytes);
1591 unsigned int offset, void *p_data, unsigned int bytes)
1593 write_vreg(vgpu, offset, p_data, bytes);
1604 unsigned int offset, void *p_data, unsigned int bytes)
1606 write_vreg(vgpu, offset, p_data, bytes);
1614 void *p_data, unsigned int bytes)
1619 write_vreg(vgpu, offset, p_data, bytes);
1633 void *p_data, unsigned int bytes)
1644 write_vreg(vgpu, offset, p_data, bytes);
1650 void *p_data, unsigned int bytes)
1652 write_vreg(vgpu, offset, p_data, bytes);
1657 void *p_data, unsigned int bytes)
1675 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1679 void *p_data, unsigned int bytes)
1733 return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);
1737 void *p_data, unsigned int bytes)
1764 return intel_vgpu_default_mmio_write(vgpu, offset, &value, bytes);
1768 unsigned int offset, void *p_data, unsigned int bytes)
1779 return intel_vgpu_default_mmio_write(vgpu, offset, &v, bytes);
1783 void *p_data, unsigned int bytes)
1797 unsigned int offset, void *p_data, unsigned int bytes)
1810 unsigned int offset, void *p_data, unsigned int bytes)
1823 unsigned int offset, void *p_data, unsigned int bytes)
1844 unsigned int offset, void *p_data, unsigned int bytes)
1852 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1856 unsigned int offset, void *p_data, unsigned int bytes)
1874 unsigned int offset, void *p_data, unsigned int bytes)
1899 unsigned int offset, void *p_data, unsigned int bytes)
1916 void *p_data, unsigned int bytes)
1935 unsigned int bytes)
1938 read_vreg(vgpu, offset, p_data, bytes);
1944 unsigned int offset, void *p_data, unsigned int bytes)
1967 return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1971 void *p_data, unsigned int bytes)
2013 void *p_data, unsigned int bytes)
2025 write_vreg(vgpu, offset, p_data, bytes);
2072 unsigned int offset, void *p_data, unsigned int bytes)
2076 write_vreg(vgpu, offset, p_data, bytes);
2104 unsigned int offset, void *p_data, unsigned int bytes)
2108 write_vreg(vgpu, offset, p_data, bytes);
2122 unsigned int bytes)
2127 write_vreg(vgpu, offset, p_data, bytes);
3047 * @bytes: access data length
3053 void *p_data, unsigned int bytes)
3055 read_vreg(vgpu, offset, p_data, bytes);
3064 * @bytes: access data length
3070 void *p_data, unsigned int bytes)
3072 write_vreg(vgpu, offset, p_data, bytes);
3081 * @bytes: access data length
3087 void *p_data, unsigned int bytes)
3092 write_vreg(vgpu, offset, p_data, bytes);
3122 * @bytes: data length
3129 void *pdata, unsigned int bytes, bool is_read)
3138 if (drm_WARN_ON(&i915->drm, bytes > 8))
3148 return func(vgpu, offset, pdata, bytes);
3157 gvt_dbg_mmio("untracked MMIO %08x len %d\n", offset, bytes);
3162 return mmio_info->read(vgpu, offset, pdata, bytes);
3173 ret = mmio_info->write(vgpu, offset, pdata, bytes);
3179 memcpy(&data, pdata, bytes);
3182 ret = mmio_info->write(vgpu, offset, &data, bytes);
3198 intel_vgpu_default_mmio_read(vgpu, offset, pdata, bytes) :
3199 intel_vgpu_default_mmio_write(vgpu, offset, pdata, bytes);