Lines Matching refs:entry
163 * - type of entry inside this level page table
164 * - type of entry with PSE set
167 * e.g. give a l4 root entry type, then request to get its PSE type,
169 * table type, as we know l4 root entry doesn't have a PSE bit,
358 #define GTT_SPTE_FLAG_64K_SPLITED BIT(52) /* splited 64K gtt entry */
439 * it also works, so we need to treat root pointer entry
525 /* Update entry type per pse and ips bit. */
527 struct intel_gvt_gtt_entry *entry, bool ips)
529 switch (entry->type) {
532 if (pte_ops->test_pse(entry))
533 entry->type = get_pse_type(entry->type);
537 entry->type = get_pse_type(entry->type);
540 GEM_BUG_ON(!gtt_type_is_entry(entry->type));
543 GEM_BUG_ON(entry->type == GTT_TYPE_INVALID);
550 struct intel_gvt_gtt_entry *entry, unsigned long index,
557 entry->type = mm->ppgtt_mm.root_entry_type;
560 entry, index, false, 0, mm->vgpu);
561 update_entry_type_for_real(pte_ops, entry, false);
565 struct intel_gvt_gtt_entry *entry, unsigned long index)
567 _ppgtt_get_root_entry(mm, entry, index, true);
571 struct intel_gvt_gtt_entry *entry, unsigned long index)
573 _ppgtt_get_root_entry(mm, entry, index, false);
577 struct intel_gvt_gtt_entry *entry, unsigned long index,
584 entry, index, false, 0, mm->vgpu);
588 struct intel_gvt_gtt_entry *entry, unsigned long index)
590 _ppgtt_set_root_entry(mm, entry, index, false);
594 struct intel_gvt_gtt_entry *entry, unsigned long index)
600 entry->type = GTT_TYPE_GGTT_PTE;
601 pte_ops->get_entry(mm->ggtt_mm.virtual_ggtt, entry, index,
606 struct intel_gvt_gtt_entry *entry, unsigned long index)
612 pte_ops->set_entry(mm->ggtt_mm.virtual_ggtt, entry, index,
617 struct intel_gvt_gtt_entry *entry, unsigned long index)
623 pte_ops->get_entry(NULL, entry, index, false, 0, mm->vgpu);
627 struct intel_gvt_gtt_entry *entry, unsigned long index)
636 mm->ggtt_mm.host_ggtt_aperture[offset] = entry->val64;
639 mm->ggtt_mm.host_ggtt_hidden[offset] = entry->val64;
642 pte_ops->set_entry(NULL, entry, index, false, 0, mm->vgpu);
660 if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))
672 gvt_vdbg_mm("read ppgtt entry, spt type %d, entry type %d, index %lu, value %llx\n",
686 if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))
689 gvt_vdbg_mm("set ppgtt entry, spt type %d, entry type %d, index %lu, value %llx\n",
981 struct intel_gvt_gtt_entry *entry)
988 pfn = ops->get_pfn(entry);
1014 gvt_vdbg_mm("invalidate 4K entry\n");
1018 /* We don't setup 64K shadow entry so far. */
1019 WARN(1, "suspicious 64K gtt entry\n");
1022 gvt_vdbg_mm("invalidate 2M entry\n");
1030 gvt_vdbg_mm("invalidate PMUL4/PDP/PDE entry\n");
1046 gvt_vgpu_err("fail: shadow page %p shadow entry 0x%llx type %d\n",
1128 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1160 gvt_dbg_mm("Split 2M gtt entry, index %lu\n", index);
1194 gvt_vdbg_mm("invalidate 4K entry\n");
1209 struct intel_gvt_gtt_entry entry = *se;
1214 gvt_vdbg_mm("Split 64K gtt entry, index %lu\n", index);
1220 entry.type = GTT_TYPE_PPGTT_PTE_4K_ENTRY;
1221 ops->set_64k_splited(&entry);
1229 ops->set_pfn(&entry, dma_addr >> PAGE_SHIFT);
1230 ppgtt_set_shadow_entry(spt, &entry, index + i);
1252 gvt_vdbg_mm("shadow 4K gtt entry\n");
1258 gvt_vdbg_mm("shadow 64K gtt entry\n");
1266 gvt_vdbg_mm("shadow 2M gtt entry\n");
1273 gvt_vgpu_err("GVT doesn't support 1GB entry\n");
1315 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1330 gvt_vdbg_mm("destroy old shadow entry, type %d, index %lu, value %llx\n",
1352 /* We don't setup 64K shadow entry so far. */
1354 "suspicious 64K entry\n");
1360 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n",
1376 gvt_vdbg_mm("add shadow entry: type %d, index %lu, value %llx\n",
1395 gvt_vgpu_err("fail: spt %p guest entry 0x%llx type %d\n",
1584 * Adding the new entry first and then removing the old one, that can
1626 gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d.\n",
1704 * For page table which has 64K gtt entry, only PTE#0, PTE#16,
1710 gvt_vdbg_mm("Ignore write to unused PTE entry, index %lu\n",
1852 * @root_entry_type: ppgtt root entry type
2117 /* walk the shadow page table and get gpa from guest entry */
2195 struct intel_gvt_gtt_entry *entry)
2200 pfn = pte_ops->get_pfn(entry);
2234 /* If ggtt entry size is 8 bytes, and it's split into two 4 bytes
2288 gvt_vgpu_err("fail to populate guest ggtt entry\n");
2289 /* guest driver may read/write the entry when partial
2290 * update the entry in this situation p2m will fail
2291 * setting the shadow entry to point to a scratch page
2402 /* The entry parameters like present/writeable/cache type
2630 * @root_entry_type: ppgtt root entry type
2777 * intel_vgpu_reset_ggtt - reset the GGTT entry
2789 struct intel_gvt_gtt_entry entry = {.type = GTT_TYPE_GGTT_PTE};
2794 pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn);
2795 pte_ops->set_present(&entry);
2804 ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
2814 ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);