Lines Matching defs:gtt

358 #define GTT_SPTE_FLAG_64K_SPLITED BIT(52) /* splited 64K gtt entry */
553 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
580 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
596 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
608 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
619 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
629 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;
655 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
684 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
747 radix_tree_delete(&spt->vgpu->gtt.spt_tree, spt->shadow_page.mfn);
768 radix_tree_for_each_slot(slot, &vgpu->gtt.spt_tree, &iter, 0) {
816 return radix_tree_lookup(&vgpu->gtt.spt_tree, mfn);
858 ret = radix_tree_insert(&vgpu->gtt.spt_tree, spt->shadow_page.mfn, spt);
912 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
918 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
947 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
968 vgpu->gtt.scratch_pt[cur_pt_type].page_mfn)
984 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
992 if (!pfn || pfn == vgpu->gtt.scratch_pt[type].page_mfn)
1019 WARN(1, "suspicious 64K gtt entry\n");
1072 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1136 const struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops;
1152 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1160 gvt_dbg_mm("Split 2M gtt entry, index %lu\n", index);
1208 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1214 gvt_vdbg_mm("Split 64K gtt entry, index %lu\n", index);
1239 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
1252 gvt_vdbg_mm("shadow 4K gtt entry\n");
1258 gvt_vdbg_mm("shadow 64K gtt entry\n");
1266 gvt_vdbg_mm("shadow 2M gtt entry\n");
1324 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1337 vgpu->gtt.scratch_pt[spt->shadow_page.type].page_mfn)
1405 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
1457 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_free_list_head);
1477 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_use_list_head);
1503 struct intel_gvt_gtt *gtt = &gvt->gtt;
1509 if (list_empty(&gtt->oos_page_free_list_head)) {
1510 oos_page = container_of(gtt->oos_page_use_list_head.next,
1519 oos_page = container_of(gtt->oos_page_free_list_head.next,
1534 list_add_tail(&oos_page->vm_list, &spt->vgpu->gtt.oos_page_list_head);
1557 list_for_each_safe(pos, n, &vgpu->gtt.oos_page_list_head) {
1576 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1608 vgpu->gtt.scratch_pt[type].page_mfn);
1615 vgpu->gtt.scratch_pt[type].page_mfn);
1619 vgpu->gtt.scratch_pt[type].page_mfn);
1648 &spt->vgpu->gtt.post_shadow_list_head);
1669 list_for_each_safe(pos, n, &vgpu->gtt.post_shadow_list_head) {
1693 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
1704 * For page table which has 64K gtt entry, only PTE#0, PTE#16,
1727 ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
1757 struct intel_gvt_gtt *gtt = &gvt->gtt;
1758 const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;
1787 struct intel_gvt_gtt *gtt = &gvt->gtt;
1788 const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;
1894 list_add_tail(&mm->ppgtt_mm.list, &vgpu->gtt.ppgtt_mm_list_head);
1896 mutex_lock(&gvt->gtt.ppgtt_mm_lock);
1897 list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head);
1898 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
1958 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
1960 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2005 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2007 &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head);
2008 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock);
2019 mutex_lock(&gvt->gtt.ppgtt_mm_lock);
2021 list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) {
2028 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
2032 mutex_unlock(&gvt->gtt.ppgtt_mm_lock);
2043 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
2072 const struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops;
2073 const struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;
2145 struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
2197 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
2201 if (pfn != vgpu->gvt->gtt.scratch_mfn)
2210 struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
2211 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
2293 ops->set_pfn(&m, gvt->gtt.scratch_mfn);
2297 ops->set_pfn(&m, gvt->gtt.scratch_mfn);
2356 struct intel_vgpu_gtt *gtt = &vgpu->gtt;
2357 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
2381 gtt->scratch_pt[type].page_mfn =
2383 gtt->scratch_pt[type].page = virt_to_page(scratch_pt);
2385 vgpu->id, type, gtt->scratch_pt[type].page_mfn);
2400 ops->set_pfn(&se, gtt->scratch_pt[type - 1].page_mfn);
2423 if (vgpu->gtt.scratch_pt[i].page != NULL) {
2424 daddr = (dma_addr_t)(vgpu->gtt.scratch_pt[i].page_mfn <<
2427 __free_page(vgpu->gtt.scratch_pt[i].page);
2428 vgpu->gtt.scratch_pt[i].page = NULL;
2429 vgpu->gtt.scratch_pt[i].page_mfn = 0;
2465 struct intel_vgpu_gtt *gtt = &vgpu->gtt;
2467 INIT_RADIX_TREE(&gtt->spt_tree, GFP_KERNEL);
2469 INIT_LIST_HEAD(&gtt->ppgtt_mm_list_head);
2470 INIT_LIST_HEAD(&gtt->oos_page_list_head);
2471 INIT_LIST_HEAD(&gtt->post_shadow_list_head);
2473 gtt->ggtt_mm = intel_vgpu_create_ggtt_mm(vgpu);
2474 if (IS_ERR(gtt->ggtt_mm)) {
2476 return PTR_ERR(gtt->ggtt_mm);
2481 INIT_LIST_HEAD(&gtt->ggtt_mm->ggtt_mm.partial_pte_list);
2491 list_for_each_safe(pos, n, &vgpu->gtt.ppgtt_mm_list_head) {
2496 if (GEM_WARN_ON(!list_empty(&vgpu->gtt.ppgtt_mm_list_head)))
2499 if (GEM_WARN_ON(!radix_tree_empty(&vgpu->gtt.spt_tree))) {
2510 &vgpu->gtt.ggtt_mm->ggtt_mm.partial_pte_list,
2516 intel_vgpu_destroy_mm(vgpu->gtt.ggtt_mm);
2517 vgpu->gtt.ggtt_mm = NULL;
2539 struct intel_gvt_gtt *gtt = &gvt->gtt;
2543 WARN(!list_empty(&gtt->oos_page_use_list_head),
2546 list_for_each_safe(pos, n, &gtt->oos_page_free_list_head) {
2556 struct intel_gvt_gtt *gtt = &gvt->gtt;
2561 INIT_LIST_HEAD(&gtt->oos_page_free_list_head);
2562 INIT_LIST_HEAD(&gtt->oos_page_use_list_head);
2580 list_add_tail(&oos_page->list, &gtt->oos_page_free_list_head);
2607 list_for_each(pos, &vgpu->gtt.ppgtt_mm_list_head) {
2694 gvt_dbg_core("init gtt\n");
2696 gvt->gtt.pte_ops = &gen8_gtt_pte_ops;
2697 gvt->gtt.gma_ops = &gen8_gtt_gma_ops;
2713 gvt->gtt.scratch_page = virt_to_page(page);
2714 gvt->gtt.scratch_mfn = (unsigned long)(daddr >> I915_GTT_PAGE_SHIFT);
2721 __free_page(gvt->gtt.scratch_page);
2725 INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head);
2726 mutex_init(&gvt->gtt.ppgtt_mm_lock);
2741 dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn <<
2746 __free_page(gvt->gtt.scratch_page);
2764 list_for_each_safe(pos, n, &vgpu->gtt.ppgtt_mm_list_head) {
2767 mutex_lock(&vgpu->gvt->gtt.ppgtt_mm_lock);
2769 mutex_unlock(&vgpu->gvt->gtt.ppgtt_mm_lock);
2788 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
2794 pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn);
2801 ggtt_get_host_entry(vgpu->gtt.ggtt_mm, &old_entry, index);
2804 ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
2811 ggtt_get_host_entry(vgpu->gtt.ggtt_mm, &old_entry, index);
2814 ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
2838 mm = vgpu->gtt.ggtt_mm;