Lines Matching refs:info
147 kfree(dmabuf_obj->info);
154 kfree(obj->info);
198 struct intel_vgpu_fb_info *info)
209 roundup(info->size, PAGE_SIZE));
219 switch (info->drm_format_mod) {
225 stride = info->stride;
230 stride = info->stride;
234 info->drm_format_mod);
238 obj->tiling_and_stride = info->drm_format_mod ?
255 struct intel_vgpu_fb_info *info,
262 memset(info, 0, sizeof(*info));
268 info->start = p.base;
269 info->start_gpa = p.base_gpa;
270 info->width = p.width;
271 info->height = p.height;
272 info->stride = p.stride;
273 info->drm_format = p.drm_format;
277 info->drm_format_mod = DRM_FORMAT_MOD_LINEAR;
280 info->drm_format_mod = I915_FORMAT_MOD_X_TILED;
284 info->drm_format_mod = I915_FORMAT_MOD_Y_TILED;
288 info->drm_format_mod = I915_FORMAT_MOD_Yf_TILED;
298 info->start = c.base;
299 info->start_gpa = c.base_gpa;
300 info->width = c.width;
301 info->height = c.height;
302 info->stride = c.width * (c.bpp / 8);
303 info->drm_format = c.drm_format;
304 info->drm_format_mod = 0;
305 info->x_pos = c.x_pos;
306 info->y_pos = c.y_pos;
309 info->x_hot = c.x_hot;
310 info->y_hot = c.y_hot;
312 info->x_hot = UINT_MAX;
313 info->y_hot = UINT_MAX;
320 info->size = info->stride * roundup(info->height, tile_height);
321 if (info->size == 0) {
326 if (info->start & (PAGE_SIZE - 1)) {
327 gvt_vgpu_err("Not aligned fb address:0x%llx\n", info->start);
331 if (!intel_gvt_ggtt_validate_range(vgpu, info->start, info->size)) {
350 if (!dmabuf_obj->info)
353 fb_info = (struct intel_vgpu_fb_info *)dmabuf_obj->info;
455 dmabuf_obj->info = kmalloc(sizeof(struct intel_vgpu_fb_info),
457 if (unlikely(!dmabuf_obj->info)) {
458 gvt_vgpu_err("allocate intel vgpu fb info failed\n");
462 memcpy(dmabuf_obj->info, &fb_info, sizeof(struct intel_vgpu_fb_info));
464 ((struct intel_vgpu_fb_info *)dmabuf_obj->info)->obj = dmabuf_obj;
491 kfree(dmabuf_obj->info);
518 obj = vgpu_create_gem(dev, dmabuf_obj->info);
525 obj->gvt_info = dmabuf_obj->info;