Lines Matching refs:hdata
677 static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
680 return hdmi_reg_map[reg_id & 0xffff][hdata->drv_data->type];
684 static inline u32 hdmi_reg_read(struct hdmi_context *hdata, u32 reg_id)
686 return readl(hdata->regs + hdmi_map_reg(hdata, reg_id));
689 static inline void hdmi_reg_writeb(struct hdmi_context *hdata,
692 writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
695 static inline void hdmi_reg_writev(struct hdmi_context *hdata, u32 reg_id,
698 reg_id = hdmi_map_reg(hdata, reg_id);
701 writel(val & 0xff, hdata->regs + reg_id);
707 static inline void hdmi_reg_write_buf(struct hdmi_context *hdata, u32 reg_id,
710 for (reg_id = hdmi_map_reg(hdata, reg_id); size; --size, reg_id += 4)
711 writel(*buf++, hdata->regs + reg_id);
714 static inline void hdmi_reg_writemask(struct hdmi_context *hdata,
719 reg_id = hdmi_map_reg(hdata, reg_id);
720 old = readl(hdata->regs + reg_id);
722 writel(value, hdata->regs + reg_id);
725 static int hdmiphy_reg_write_buf(struct hdmi_context *hdata,
731 if (hdata->hdmiphy_port) {
734 ret = i2c_master_send(hdata->hdmiphy_port, buf, len);
741 writel(buf[i], hdata->regs_hdmiphy +
747 static int hdmi_clk_enable_gates(struct hdmi_context *hdata)
751 for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
752 ret = clk_prepare_enable(hdata->clk_gates[i]);
756 dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",
757 hdata->drv_data->clk_gates.data[i], ret);
759 clk_disable_unprepare(hdata->clk_gates[i]);
766 static void hdmi_clk_disable_gates(struct hdmi_context *hdata)
768 int i = hdata->drv_data->clk_gates.count;
771 clk_disable_unprepare(hdata->clk_gates[i]);
774 static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy)
776 struct device *dev = hdata->dev;
780 for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
781 struct clk **c = &hdata->clk_muxes[i];
788 hdata->drv_data->clk_muxes.data[i + 2],
789 hdata->drv_data->clk_muxes.data[i + to_phy], ret);
795 static int hdmi_audio_infoframe_apply(struct hdmi_context *hdata)
797 struct hdmi_audio_infoframe *infoframe = &hdata->audio.infoframe;
805 hdmi_reg_writeb(hdata, HDMI_AUI_CON, HDMI_AUI_CON_EVERY_VSYNC);
806 hdmi_reg_write_buf(hdata, HDMI_AUI_HEADER0, buf, len);
811 static void hdmi_reg_infoframes(struct hdmi_context *hdata)
813 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
818 if (hdata->dvi_mode) {
819 hdmi_reg_writeb(hdata, HDMI_AVI_CON,
821 hdmi_reg_writeb(hdata, HDMI_VSI_CON,
823 hdmi_reg_writeb(hdata, HDMI_AUI_CON, HDMI_AUI_CON_NO_TRAN);
828 &hdata->connector, m);
832 hdmi_reg_writeb(hdata, HDMI_AVI_CON, HDMI_AVI_CON_EVERY_VSYNC);
833 hdmi_reg_write_buf(hdata, HDMI_AVI_HEADER0, buf, ret);
839 &hdata->connector, m);
844 hdmi_reg_writeb(hdata, HDMI_VSI_CON, HDMI_VSI_CON_EVERY_VSYNC);
845 hdmi_reg_write_buf(hdata, HDMI_VSI_HEADER0, buf, 3);
846 hdmi_reg_write_buf(hdata, HDMI_VSI_DATA(0), buf + 3, ret - 3);
849 hdmi_audio_infoframe_apply(hdata);
855 struct hdmi_context *hdata = connector_to_hdmi(connector);
857 if (gpiod_get_value(hdata->hpd_gpio))
860 cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID);
866 struct hdmi_context *hdata = connector_to_hdmi(connector);
868 cec_notifier_conn_unregister(hdata->notifier);
885 struct hdmi_context *hdata = connector_to_hdmi(connector);
889 if (!hdata->ddc_adpt)
892 edid = drm_get_edid(connector, hdata->ddc_adpt);
896 hdata->dvi_mode = !connector->display_info.is_hdmi;
897 DRM_DEV_DEBUG_KMS(hdata->dev, "%s : width[%d] x height[%d]\n",
898 (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
902 cec_notifier_set_phys_addr_from_edid(hdata->notifier, edid);
911 static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
913 const struct hdmiphy_configs *confs = &hdata->drv_data->phy_confs;
920 DRM_DEV_DEBUG_KMS(hdata->dev, "Could not find phy config for %d\n",
928 struct hdmi_context *hdata = connector_to_hdmi(connector);
931 DRM_DEV_DEBUG_KMS(hdata->dev,
938 ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
952 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
953 struct drm_connector *connector = &hdata->connector;
960 ret = drm_connector_init_with_ddc(hdata->drm_dev, connector,
963 hdata->ddc_adpt);
965 DRM_DEV_ERROR(hdata->dev,
973 if (hdata->bridge)
974 ret = drm_bridge_attach(encoder, hdata->bridge, NULL, 0);
978 hdata->notifier = cec_notifier_conn_register(hdata->dev, NULL,
980 if (!hdata->notifier) {
982 DRM_DEV_ERROR(hdata->dev, "Failed to allocate CEC notifier\n");
1043 static void hdmi_reg_acr(struct hdmi_context *hdata, u32 freq)
1050 hdmi_reg_writev(hdata, HDMI_ACR_N0, 3, n);
1051 hdmi_reg_writev(hdata, HDMI_ACR_MCTS0, 3, cts);
1052 hdmi_reg_writev(hdata, HDMI_ACR_CTS0, 3, cts);
1053 hdmi_reg_writeb(hdata, HDMI_ACR_CON, 4);
1056 static void hdmi_audio_config(struct hdmi_context *hdata)
1062 switch (hdata->audio.params.sample_width) {
1075 hdmi_reg_acr(hdata, hdata->audio.params.sample_rate);
1077 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CON, HDMI_I2S_IN_DISABLE
1081 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CH, HDMI_I2S_CH0_EN
1084 hdmi_reg_writeb(hdata, HDMI_I2S_MUX_CUV, HDMI_I2S_CUV_RL_EN);
1085 hdmi_reg_writeb(hdata, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_DIS);
1086 hdmi_reg_writeb(hdata, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_EN);
1088 val = hdmi_reg_read(hdata, HDMI_I2S_DSD_CON) | 0x01;
1089 hdmi_reg_writeb(hdata, HDMI_I2S_DSD_CON, val);
1092 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_0, HDMI_I2S_SEL_SCLK(5)
1095 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(3)
1098 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_2, HDMI_I2S_SEL_SDATA3(1)
1101 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_3, HDMI_I2S_SEL_DSD(0));
1104 hdmi_reg_writeb(hdata, HDMI_I2S_CON_1, HDMI_I2S_SCLK_FALLING_EDGE
1106 hdmi_reg_writeb(hdata, HDMI_I2S_CON_2, HDMI_I2S_MSB_FIRST_MODE
1113 hdmi_reg_writeb(hdata, HDMI_I2S_CH_ST(i),
1114 hdata->audio.params.iec.status[i]);
1116 hdmi_reg_writeb(hdata, HDMI_I2S_CH_ST_CON, HDMI_I2S_CH_STATUS_RELOAD);
1119 static void hdmi_audio_control(struct hdmi_context *hdata)
1121 bool enable = !hdata->audio.mute;
1123 if (hdata->dvi_mode)
1126 hdmi_reg_writeb(hdata, HDMI_AUI_CON, enable ?
1128 hdmi_reg_writemask(hdata, HDMI_CON_0, enable ?
1132 static void hdmi_start(struct hdmi_context *hdata, bool start)
1134 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1140 hdmi_reg_writemask(hdata, HDMI_CON_0, val, HDMI_EN);
1141 hdmi_reg_writemask(hdata, HDMI_TG_CMD, val, HDMI_TG_EN | HDMI_FIELD_EN);
1144 static void hdmi_conf_init(struct hdmi_context *hdata)
1147 hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL |
1151 hdmi_reg_writemask(hdata, HDMI_MODE_SEL,
1154 hdmi_reg_writeb(hdata, HDMI_CON_2, 0);
1156 hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_BLUE_SCR_EN);
1158 if (hdata->dvi_mode) {
1159 hdmi_reg_writemask(hdata, HDMI_MODE_SEL,
1161 hdmi_reg_writeb(hdata, HDMI_CON_2,
1165 if (hdata->drv_data->type == HDMI_TYPE13) {
1167 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_0, 0x12);
1168 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_1, 0x34);
1169 hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_2, 0x56);
1172 hdmi_reg_writeb(hdata, HDMI_V13_AVI_CON, 0x02);
1174 hdmi_reg_writeb(hdata, HDMI_V13_AVI_BYTE(0), 0 << 5);
1175 hdmi_reg_writemask(hdata, HDMI_CON_1, 0x10 << 5, 0x11 << 5);
1177 hdmi_reg_writeb(hdata, HDMI_V13_SPD_CON, 0x02);
1178 hdmi_reg_writeb(hdata, HDMI_V13_AUI_CON, 0x02);
1179 hdmi_reg_writeb(hdata, HDMI_V13_ACR_CON, 0x04);
1181 hdmi_reg_infoframes(hdata);
1184 hdmi_reg_writemask(hdata, HDMI_CON_1, 2, 3 << 5);
1188 static void hdmiphy_wait_for_pll(struct hdmi_context *hdata)
1193 u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
1196 DRM_DEV_DEBUG_KMS(hdata->dev,
1204 DRM_DEV_ERROR(hdata->dev, "PLL could not reach steady state\n");
1207 static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
1209 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1212 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1213 hdmi_reg_writev(hdata, HDMI_V13_H_V_LINE_0, 3,
1217 hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1, val);
1220 hdmi_reg_writev(hdata, HDMI_INT_PRO_MODE, 1, val);
1225 hdmi_reg_writev(hdata, HDMI_V13_H_SYNC_GEN_0, 3, val);
1237 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_1_0, 3, val);
1241 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_0, 3, val);
1246 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_F_0, 3, val);
1250 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_2_0, 3, val);
1255 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_3_0, 3, val);
1257 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1259 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1261 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x249);
1265 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_0, 3, val);
1267 hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_F_0, 3, 0);
1271 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_1_0, 3, val);
1273 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_2_0, 3, 0x1001);
1274 hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_3_0, 3, 0x1001);
1275 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1277 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1280 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1281 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay);
1282 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay);
1283 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1286 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
1288 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1290 &hdata->encoder.crtc->state->adjusted_mode;
1302 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1303 hdmi_reg_writev(hdata, HDMI_V_LINE_0, 2, m->vtotal);
1304 hdmi_reg_writev(hdata, HDMI_H_LINE_0, 2, m->htotal);
1305 hdmi_reg_writev(hdata, HDMI_HSYNC_POL, 1,
1307 hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1,
1309 hdmi_reg_writev(hdata, HDMI_INT_PRO_MODE, 1,
1320 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2,
1322 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2,
1324 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal / 2);
1325 hdmi_reg_writev(hdata, HDMI_V1_BLANK_0, 2,
1327 hdmi_reg_writev(hdata, HDMI_V_BLANK_F0_0, 2,
1329 hdmi_reg_writev(hdata, HDMI_V_BLANK_F1_0, 2, m->vtotal);
1330 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_2_0, 2,
1332 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_1_0, 2,
1334 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_2_0, 2,
1336 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_1_0, 2,
1338 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1340 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1341 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2,
1343 hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2,
1345 hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2,
1347 hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2,
1349 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST3_L, 2, 0x0);
1350 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST4_L, 2, 0x0);
1352 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2,
1354 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2,
1356 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal);
1357 hdmi_reg_writev(hdata, HDMI_V1_BLANK_0, 2,
1359 hdmi_reg_writev(hdata, HDMI_V_BLANK_F0_0, 2, 0xffff);
1360 hdmi_reg_writev(hdata, HDMI_V_BLANK_F1_0, 2, 0xffff);
1361 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_2_0, 2, 0xffff);
1362 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_1_0, 2, 0xffff);
1363 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_2_0, 2, 0xffff);
1364 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_1_0, 2, 0xffff);
1365 hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
1367 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1370 hdmi_reg_writev(hdata, HDMI_H_SYNC_START_0, 2,
1372 hdmi_reg_writev(hdata, HDMI_H_SYNC_END_0, 2,
1374 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_1_0, 2, 0xffff);
1375 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_2_0, 2, 0xffff);
1376 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_3_0, 2, 0xffff);
1377 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_4_0, 2, 0xffff);
1378 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_5_0, 2, 0xffff);
1379 hdmi_reg_writev(hdata, HDMI_VACT_SPACE_6_0, 2, 0xffff);
1380 hdmi_reg_writev(hdata, HDMI_V_BLANK_F2_0, 2, 0xffff);
1381 hdmi_reg_writev(hdata, HDMI_V_BLANK_F3_0, 2, 0xffff);
1382 hdmi_reg_writev(hdata, HDMI_V_BLANK_F4_0, 2, 0xffff);
1383 hdmi_reg_writev(hdata, HDMI_V_BLANK_F5_0, 2, 0xffff);
1384 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_3_0, 2, 0xffff);
1385 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_4_0, 2, 0xffff);
1386 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_5_0, 2, 0xffff);
1387 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_6_0, 2, 0xffff);
1388 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_3_0, 2, 0xffff);
1389 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_4_0, 2, 0xffff);
1390 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_5_0, 2, 0xffff);
1391 hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_6_0, 2, 0xffff);
1393 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1394 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2,
1396 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay + hquirk);
1397 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1398 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1399 hdmi_reg_writeb(hdata, HDMI_TG_DECON_EN, 1);
1402 static void hdmi_mode_apply(struct hdmi_context *hdata)
1404 if (hdata->drv_data->type == HDMI_TYPE13)
1405 hdmi_v13_mode_apply(hdata);
1407 hdmi_v14_mode_apply(hdata);
1409 hdmi_start(hdata, true);
1412 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
1414 hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, 0, 1);
1416 hdmi_reg_writemask(hdata, HDMI_CORE_RSTOUT, ~0, 1);
1418 hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
1420 hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT);
1424 static void hdmiphy_enable_mode_set(struct hdmi_context *hdata, bool enable)
1428 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1429 writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE);
1432 static void hdmiphy_conf_apply(struct hdmi_context *hdata)
1434 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1438 ret = hdmi_find_phy_conf(hdata, m->clock * 1000);
1440 DRM_DEV_ERROR(hdata->dev, "failed to find hdmiphy conf\n");
1443 phy_conf = hdata->drv_data->phy_confs.data[ret].conf;
1445 hdmi_clk_set_parents(hdata, false);
1447 hdmiphy_conf_reset(hdata);
1449 hdmiphy_enable_mode_set(hdata, true);
1450 ret = hdmiphy_reg_write_buf(hdata, 0, phy_conf, 32);
1452 DRM_DEV_ERROR(hdata->dev, "failed to configure hdmiphy\n");
1455 hdmiphy_enable_mode_set(hdata, false);
1456 hdmi_clk_set_parents(hdata, true);
1458 hdmiphy_wait_for_pll(hdata);
1461 /* Should be called with hdata->mutex mutex held */
1462 static void hdmi_conf_apply(struct hdmi_context *hdata)
1464 hdmi_start(hdata, false);
1465 hdmi_conf_init(hdata);
1466 hdmi_audio_config(hdata);
1467 hdmi_mode_apply(hdata);
1468 hdmi_audio_control(hdata);
1471 static void hdmi_set_refclk(struct hdmi_context *hdata, bool on)
1473 if (!hdata->sysreg)
1476 regmap_update_bits(hdata->sysreg, EXYNOS5433_SYSREG_DISP_HDMI_PHY,
1480 /* Should be called with hdata->mutex mutex held. */
1481 static void hdmiphy_enable(struct hdmi_context *hdata)
1485 if (hdata->powered)
1488 ret = pm_runtime_resume_and_get(hdata->dev);
1490 dev_err(hdata->dev, "failed to enable HDMIPHY device.\n");
1494 if (regulator_bulk_enable(ARRAY_SIZE(supply), hdata->regul_bulk))
1495 DRM_DEV_DEBUG_KMS(hdata->dev,
1498 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1501 hdmi_set_refclk(hdata, true);
1503 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0, HDMI_PHY_POWER_OFF_EN);
1505 hdmiphy_conf_apply(hdata);
1507 hdata->powered = true;
1510 /* Should be called with hdata->mutex mutex held. */
1511 static void hdmiphy_disable(struct hdmi_context *hdata)
1513 if (!hdata->powered)
1516 hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
1518 hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0, HDMI_PHY_POWER_OFF_EN);
1520 hdmi_set_refclk(hdata, false);
1522 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1525 regulator_bulk_disable(ARRAY_SIZE(supply), hdata->regul_bulk);
1527 pm_runtime_put_sync(hdata->dev);
1529 hdata->powered = false;
1534 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
1536 mutex_lock(&hdata->mutex);
1538 hdmiphy_enable(hdata);
1539 hdmi_conf_apply(hdata);
1541 mutex_unlock(&hdata->mutex);
1546 struct hdmi_context *hdata = encoder_to_hdmi(encoder);
1548 mutex_lock(&hdata->mutex);
1550 if (hdata->powered) {
1560 mutex_unlock(&hdata->mutex);
1561 cancel_delayed_work(&hdata->hotplug_work);
1562 if (hdata->notifier)
1563 cec_notifier_phys_addr_invalidate(hdata->notifier);
1567 mutex_unlock(&hdata->mutex);
1578 struct hdmi_context *hdata = dev_get_drvdata(dev);
1580 mutex_lock(&hdata->mutex);
1582 hdata->audio.mute = true;
1584 if (hdata->powered)
1585 hdmi_audio_control(hdata);
1587 mutex_unlock(&hdata->mutex);
1594 struct hdmi_context *hdata = dev_get_drvdata(dev);
1606 mutex_lock(&hdata->mutex);
1608 hdata->audio.params = *params;
1610 if (hdata->powered) {
1611 hdmi_audio_config(hdata);
1612 hdmi_audio_infoframe_apply(hdata);
1615 mutex_unlock(&hdata->mutex);
1623 struct hdmi_context *hdata = dev_get_drvdata(dev);
1625 mutex_lock(&hdata->mutex);
1627 hdata->audio.mute = mute;
1629 if (hdata->powered)
1630 hdmi_audio_control(hdata);
1632 mutex_unlock(&hdata->mutex);
1640 struct hdmi_context *hdata = dev_get_drvdata(dev);
1641 struct drm_connector *connector = &hdata->connector;
1656 static int hdmi_register_audio_device(struct hdmi_context *hdata)
1664 hdata->audio.pdev = platform_device_register_data(
1665 hdata->dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
1668 return PTR_ERR_OR_ZERO(hdata->audio.pdev);
1673 struct hdmi_context *hdata;
1675 hdata = container_of(work, struct hdmi_context, hotplug_work.work);
1677 if (hdata->drm_dev)
1678 drm_helper_hpd_irq_event(hdata->drm_dev);
1683 struct hdmi_context *hdata = arg;
1685 mod_delayed_work(system_wq, &hdata->hotplug_work,
1691 static int hdmi_clks_get(struct hdmi_context *hdata,
1695 struct device *dev = hdata->dev;
1716 static int hdmi_clk_init(struct hdmi_context *hdata)
1718 const struct hdmi_driver_data *drv_data = hdata->drv_data;
1720 struct device *dev = hdata->dev;
1731 hdata->clk_gates = clks;
1732 hdata->clk_muxes = clks + drv_data->clk_gates.count;
1734 ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates);
1738 return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
1744 struct hdmi_context *hdata = container_of(clk, struct hdmi_context,
1746 mutex_lock(&hdata->mutex);
1749 hdmiphy_enable(hdata);
1751 hdmiphy_disable(hdata);
1753 mutex_unlock(&hdata->mutex);
1756 static int hdmi_bridge_init(struct hdmi_context *hdata)
1758 struct device *dev = hdata->dev;
1772 hdata->bridge = of_drm_find_bridge(np);
1775 if (!hdata->bridge)
1781 static int hdmi_resources_init(struct hdmi_context *hdata)
1783 struct device *dev = hdata->dev;
1788 hdata->hpd_gpio = devm_gpiod_get(dev, "hpd", GPIOD_IN);
1789 if (IS_ERR(hdata->hpd_gpio)) {
1791 return PTR_ERR(hdata->hpd_gpio);
1794 hdata->irq = gpiod_to_irq(hdata->hpd_gpio);
1795 if (hdata->irq < 0) {
1797 return hdata->irq;
1800 ret = hdmi_clk_init(hdata);
1804 ret = hdmi_clk_set_parents(hdata, false);
1809 hdata->regul_bulk[i].supply = supply[i];
1811 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(supply), hdata->regul_bulk);
1815 hdata->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en");
1817 if (PTR_ERR(hdata->reg_hdmi_en) != -ENODEV)
1818 if (IS_ERR(hdata->reg_hdmi_en))
1819 return PTR_ERR(hdata->reg_hdmi_en);
1821 return hdmi_bridge_init(hdata);
1846 struct hdmi_context *hdata = dev_get_drvdata(dev);
1847 struct drm_encoder *encoder = &hdata->encoder;
1851 hdata->drm_dev = drm_dev;
1853 hdata->phy_clk.enable = hdmiphy_clk_enable;
1866 crtc->pipe_clk = &hdata->phy_clk;
1888 static int hdmi_get_ddc_adapter(struct hdmi_context *hdata)
1898 np = of_parse_phandle(hdata->dev->of_node, "ddc", 0);
1901 DRM_DEV_ERROR(hdata->dev,
1914 hdata->ddc_adpt = adpt;
1919 static int hdmi_get_phy_io(struct hdmi_context *hdata)
1927 np = of_parse_phandle(hdata->dev->of_node, "phy", 0);
1929 DRM_DEV_ERROR(hdata->dev,
1935 if (hdata->drv_data->is_apb_phy) {
1936 hdata->regs_hdmiphy = of_iomap(np, 0);
1937 if (!hdata->regs_hdmiphy) {
1938 DRM_DEV_ERROR(hdata->dev,
1944 hdata->hdmiphy_port = of_find_i2c_device_by_node(np);
1945 if (!hdata->hdmiphy_port) {
1961 struct hdmi_context *hdata;
1964 hdata = devm_kzalloc(dev, sizeof(struct hdmi_context), GFP_KERNEL);
1965 if (!hdata)
1968 hdata->drv_data = of_device_get_match_data(dev);
1970 platform_set_drvdata(pdev, hdata);
1972 hdata->dev = dev;
1974 mutex_init(&hdata->mutex);
1976 ret = hdmi_resources_init(hdata);
1983 hdata->regs = devm_platform_ioremap_resource(pdev, 0);
1984 if (IS_ERR(hdata->regs)) {
1985 ret = PTR_ERR(hdata->regs);
1989 ret = hdmi_get_ddc_adapter(hdata);
1993 ret = hdmi_get_phy_io(hdata);
1997 INIT_DELAYED_WORK(&hdata->hotplug_work, hdmi_hotplug_work_func);
1999 ret = devm_request_threaded_irq(dev, hdata->irq, NULL,
2002 "hdmi", hdata);
2008 hdata->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node,
2010 if (IS_ERR(hdata->pmureg)) {
2016 if (hdata->drv_data->has_sysreg) {
2017 hdata->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,
2019 if (IS_ERR(hdata->sysreg)) {
2026 if (!IS_ERR(hdata->reg_hdmi_en)) {
2027 ret = regulator_enable(hdata->reg_hdmi_en);
2037 audio_infoframe = &hdata->audio.infoframe;
2044 ret = hdmi_register_audio_device(hdata);
2055 platform_device_unregister(hdata->audio.pdev);
2059 if (!IS_ERR(hdata->reg_hdmi_en))
2060 regulator_disable(hdata->reg_hdmi_en);
2062 if (hdata->hdmiphy_port)
2063 put_device(&hdata->hdmiphy_port->dev);
2064 if (hdata->regs_hdmiphy)
2065 iounmap(hdata->regs_hdmiphy);
2067 put_device(&hdata->ddc_adpt->dev);
2074 struct hdmi_context *hdata = platform_get_drvdata(pdev);
2076 cancel_delayed_work_sync(&hdata->hotplug_work);
2079 platform_device_unregister(hdata->audio.pdev);
2083 if (!IS_ERR(hdata->reg_hdmi_en))
2084 regulator_disable(hdata->reg_hdmi_en);
2086 if (hdata->hdmiphy_port)
2087 put_device(&hdata->hdmiphy_port->dev);
2089 if (hdata->regs_hdmiphy)
2090 iounmap(hdata->regs_hdmiphy);
2092 put_device(&hdata->ddc_adpt->dev);
2094 mutex_destroy(&hdata->mutex);
2101 struct hdmi_context *hdata = dev_get_drvdata(dev);
2103 hdmi_clk_disable_gates(hdata);
2110 struct hdmi_context *hdata = dev_get_drvdata(dev);
2113 ret = hdmi_clk_enable_gates(hdata);