Lines Matching refs:gpu
18 u32 (*sample)(struct etnaviv_gpu *gpu,
40 static u32 perf_reg_read(struct etnaviv_gpu *gpu,
44 gpu_write(gpu, domain->profile_config, signal->data);
46 return gpu_read(gpu, domain->profile_read);
49 static inline void pipe_select(struct etnaviv_gpu *gpu, u32 clock, unsigned pipe)
54 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);
57 static u32 pipe_perf_reg_read(struct etnaviv_gpu *gpu,
61 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
65 for (i = 0; i < gpu->identity.pixel_pipes; i++) {
66 pipe_select(gpu, clock, i);
67 value += perf_reg_read(gpu, domain, signal);
71 pipe_select(gpu, clock, 0);
76 static u32 pipe_reg_read(struct etnaviv_gpu *gpu,
80 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
84 for (i = 0; i < gpu->identity.pixel_pipes; i++) {
85 pipe_select(gpu, clock, i);
86 value += gpu_read(gpu, signal->data);
90 pipe_select(gpu, clock, 0);
95 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu,
101 if (gpu->identity.model == chipModel_GC880 ||
102 gpu->identity.model == chipModel_GC2000 ||
103 gpu->identity.model == chipModel_GC2100)
106 return gpu_read(gpu, reg);
109 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu,
115 if (gpu->identity.model == chipModel_GC880 ||
116 gpu->identity.model == chipModel_GC2000 ||
117 gpu->identity.model == chipModel_GC2100)
120 return gpu_read(gpu, reg);
462 static unsigned int num_pm_domains(const struct etnaviv_gpu *gpu)
469 if (gpu->identity.features & meta->feature)
476 static const struct etnaviv_pm_domain *pm_domain(const struct etnaviv_gpu *gpu,
485 if (!(gpu->identity.features & meta->feature))
499 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu,
502 const unsigned int nr_domains = num_pm_domains(gpu);
508 dom = pm_domain(gpu, domain->iter);
523 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu,
526 const unsigned int nr_domains = num_pm_domains(gpu);
533 dom = pm_domain(gpu, signal->domain);
569 void etnaviv_perfmon_process(struct etnaviv_gpu *gpu,
580 val = sig->sample(gpu, dom, sig);