Lines Matching refs:idle
458 /* GC600/300 idle register reports zero bits where modules aren't present */
499 * until new work is picked up by the FE when it polls in the idle loop.
508 u32 control, idle;
545 /* read idle register. */
546 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
548 /* try resetting again if FE is not idle */
549 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0) {
550 dev_dbg(gpu->dev, "FE is not idle\n");
557 /* is the GPU idle? */
560 dev_dbg(gpu->dev, "GPU is not idle\n");
573 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
577 idle & VIVS_HI_IDLE_STATE_FE ? "" : "not ",
917 u32 dma_lo, dma_hi, axi, idle;
929 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
995 seq_printf(m, "\tidle: 0x%08x\n", idle);
996 idle |= ~gpu->idle_mask & ~VIVS_HI_IDLE_STATE_AXI_LP;
997 if ((idle & VIVS_HI_IDLE_STATE_FE) == 0)
998 seq_puts(m, "\t FE is not idle\n");
999 if ((idle & VIVS_HI_IDLE_STATE_DE) == 0)
1000 seq_puts(m, "\t DE is not idle\n");
1001 if ((idle & VIVS_HI_IDLE_STATE_PE) == 0)
1002 seq_puts(m, "\t PE is not idle\n");
1003 if ((idle & VIVS_HI_IDLE_STATE_SH) == 0)
1004 seq_puts(m, "\t SH is not idle\n");
1005 if ((idle & VIVS_HI_IDLE_STATE_PA) == 0)
1006 seq_puts(m, "\t PA is not idle\n");
1007 if ((idle & VIVS_HI_IDLE_STATE_SE) == 0)
1008 seq_puts(m, "\t SE is not idle\n");
1009 if ((idle & VIVS_HI_IDLE_STATE_RA) == 0)
1010 seq_puts(m, "\t RA is not idle\n");
1011 if ((idle & VIVS_HI_IDLE_STATE_TX) == 0)
1012 seq_puts(m, "\t TX is not idle\n");
1013 if ((idle & VIVS_HI_IDLE_STATE_VG) == 0)
1014 seq_puts(m, "\t VG is not idle\n");
1015 if ((idle & VIVS_HI_IDLE_STATE_IM) == 0)
1016 seq_puts(m, "\t IM is not idle\n");
1017 if ((idle & VIVS_HI_IDLE_STATE_FP) == 0)
1018 seq_puts(m, "\t FP is not idle\n");
1019 if ((idle & VIVS_HI_IDLE_STATE_TS) == 0)
1020 seq_puts(m, "\t TS is not idle\n");
1021 if ((idle & VIVS_HI_IDLE_STATE_BL) == 0)
1022 seq_puts(m, "\t BL is not idle\n");
1023 if ((idle & VIVS_HI_IDLE_STATE_ASYNCFE) == 0)
1024 seq_puts(m, "\t ASYNCFE is not idle\n");
1025 if ((idle & VIVS_HI_IDLE_STATE_MC) == 0)
1026 seq_puts(m, "\t MC is not idle\n");
1027 if ((idle & VIVS_HI_IDLE_STATE_PPA) == 0)
1028 seq_puts(m, "\t PPA is not idle\n");
1029 if ((idle & VIVS_HI_IDLE_STATE_WD) == 0)
1030 seq_puts(m, "\t WD is not idle\n");
1031 if ((idle & VIVS_HI_IDLE_STATE_NN) == 0)
1032 seq_puts(m, "\t NN is not idle\n");
1033 if ((idle & VIVS_HI_IDLE_STATE_TP) == 0)
1034 seq_puts(m, "\t TP is not idle\n");
1035 if (idle & VIVS_HI_IDLE_STATE_AXI_LP)
1636 u32 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE);
1638 if ((idle & gpu->idle_mask) == gpu->idle_mask)
1643 "timed out waiting for idle: idle=0x%x\n",
1644 idle);
1917 u32 idle, mask;
1919 /* If there are any jobs in the HW queue, we're not idle */
1923 /* Check whether the hardware (except FE and MC) is idle */
1926 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE) & mask;
1927 if (idle != mask) {
1928 dev_warn_ratelimited(dev, "GPU not yet idle, mask: 0x%08x\n",
1929 idle);