Lines Matching defs:clock
66 /* Reported 135MHz pixel clock is too high, needs adjustment */
3261 return DIV_ROUND_CLOSEST(mode->clock, mode->htotal);
3489 mode->clock = 1088 * 10;
3491 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
3612 if (mode->clock > max_clock)
4058 * Detailed modes are limited to 10kHz pixel clock resolution,
4059 * so fix up anything that looks like CEA/HDMI mode, but the clock
4194 * Calculate the alternate clock for the CEA mode
4200 unsigned int clock = cea_mode->clock;
4203 return clock;
4211 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
4213 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
4215 return clock;
4259 if (!to_match->clock)
4272 clock1 = cea_mode.clock;
4275 if (abs(to_match->clock - clock1) > clock_tolerance &&
4276 abs(to_match->clock - clock2) > clock_tolerance)
4300 if (!to_match->clock)
4313 clock1 = cea_mode.clock;
4316 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
4317 KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
4351 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
4366 if (!to_match->clock)
4377 clock1 = hdmi_mode->clock;
4380 if (abs(to_match->clock - clock1) > clock_tolerance &&
4381 abs(to_match->clock - clock2) > clock_tolerance)
4404 if (!to_match->clock)
4415 clock1 = hdmi_mode->clock;
4418 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
4419 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
4445 * with the alternate clock for certain CEA modes.
4467 clock1 = cea_mode->clock;
4472 if (mode->clock != clock1 && mode->clock != clock2)
4484 * sure to pick the "other" clock for the new mode.
4486 if (mode->clock != clock1)
4487 newmode->clock = clock1;
4489 newmode->clock = clock2;
5286 int clock1, clock2, clock;
5291 * allow 5kHz clock difference either way to account for
5292 * the 10kHz clock resolution limit of detailed timings.
5298 clock1 = cea_mode->clock;
5305 clock1 = cea_mode->clock;
5313 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
5314 clock = clock1;
5316 clock = clock2;
5318 if (mode->clock == clock)
5322 "[CONNECTOR:%d:%s] detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
5324 type, vic, mode->clock, clock);
5325 mode->clock = clock;
6103 /* max clock is 5000 KHz times block value */
6133 "[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, DSC 1.2 support: %s\n",
6221 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI: DVI dual %d, max TMDS clock %d kHz\n",
6648 mode->clock = type_7 ? pixel_clock : pixel_clock * 10;