Lines Matching defs:val
210 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
212 regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
217 unsigned int val = 0;
219 regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
221 return val;
1005 u8 val;
1052 val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
1055 hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
1058 val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
1061 hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
1206 u8 val, vp_conf;
1256 val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
1261 hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
1269 val = hdmi_readb(hdmi, HDMI_FC_DATAUTO3);
1271 val &= ~HDMI_FC_DATAUTO3_GCP_AUTO;
1273 val |= HDMI_FC_DATAUTO3_GCP_AUTO;
1274 hdmi_writeb(hdmi, val, HDMI_FC_DATAUTO3);
1339 u32 val;
1341 while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
1346 hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
1501 u16 val;
1516 val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
1517 if (!(val & HDMI_PHY_TX_PHY_LOCK))
1523 if (val & HDMI_PHY_TX_PHY_LOCK)
1535 u8 val;
1551 val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
1552 if (val)
1558 if (!val) {
1769 u8 val;
1836 val = (frame.scan_mode & 3) << 4 | (frame.colorspace & 3);
1838 val |= HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT;
1840 val |= HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR;
1842 val |= HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR;
1843 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
1846 val = ((frame.colorimetry & 0x3) << 6) |
1849 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
1852 val = ((frame.extended_colorimetry & 0x7) << 4) |
1856 val |= HDMI_FC_AVICONF2_IT_CONTENT_VALID;
1857 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
1860 val = frame.video_code & 0x7f;
1861 hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
1864 val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
1870 hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
1876 val = ((frame.ycc_quantization_range & 0x3) << 2) |
1878 hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
2201 u8 val;
2230 val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
2232 hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
3348 u32 val = 1;
3393 of_property_read_u32(np, "reg-io-width", &val);
3394 switch (val) {