Lines Matching defs:stat

78 	u8 stat[MHL_DST_SIZE];
1591 memset(ctx->stat, 0, sizeof(ctx->stat));
1612 u8 stat = sii8620_readb(ctx, REG_CBUS_DISC_INTR0);
1614 if (stat & VAL_CBUS_MHL_DISCON)
1617 if (stat & BIT_RGND_READY_INT) {
1634 if (stat & BIT_MHL_EST_INT)
1637 sii8620_write(ctx, REG_CBUS_DISC_INTR0, stat);
1653 u8 stat = sii8620_readb(ctx, REG_MDT_INT_0);
1655 if (stat & BIT_MDT_IDLE_AFTER_HAWB_DISABLE)
1660 if (stat & BIT_MDT_RFIFO_DATA_RDY)
1663 if (stat & BIT_MDT_XFIFO_EMPTY)
1666 sii8620_write(ctx, REG_MDT_INT_0, stat);
1673 mode = ctx->stat[MHL_DST_VERSION] >= 0x30 ? CM_MHL3 : CM_MHL1;
1690 if (ctx->stat[MHL_DST_LINK_MODE] & MHL_DST_LM_PATH_ENABLED)
1704 sii8620_update_array(ctx->stat, st, MHL_DST_SIZE);
1707 if (ctx->stat[MHL_DST_CONNECTED_RDY] & st[MHL_DST_CONNECTED_RDY] &
1855 u8 stat = sii8620_readb(ctx, REG_CBUS_INT_0);
1857 if (stat & ~BIT_CBUS_HPD_CHG)
1858 sii8620_write(ctx, REG_CBUS_INT_0, stat & ~BIT_CBUS_HPD_CHG);
1860 if (stat & BIT_CBUS_HPD_CHG) {
1866 stat ^= BIT_CBUS_STATUS_CBUS_HPD;
1872 if (stat & BIT_CBUS_MSC_MR_WRITE_STAT)
1875 if (stat & BIT_CBUS_HPD_CHG) {
1884 if (stat & BIT_CBUS_MSC_MR_SET_INT)
1887 if (stat & BIT_CBUS_MSC_MT_DONE)
1890 if (stat & BIT_CBUS_MSC_MR_MSC_MSG)
1896 u8 stat = sii8620_readb(ctx, REG_COC_INTR);
1898 if (stat & BIT_COC_CALIBRATION_DONE) {
1911 sii8620_write(ctx, REG_COC_INTR, stat);
1916 u8 stat = sii8620_readb(ctx, REG_CBUS_INT_1);
1918 sii8620_write(ctx, REG_CBUS_INT_1, stat);
1923 u8 stat = sii8620_readb(ctx, REG_INTR9);
1925 sii8620_write(ctx, REG_INTR9, stat);
1927 if (stat & BIT_INTR9_DEVCAP_DONE)
1933 u8 stat = sii8620_readb(ctx, REG_INTR5);
1935 if (stat & BIT_INTR_SCDT_CHANGE) {
1942 sii8620_write(ctx, REG_INTR5, stat);
1955 u8 stat = sii8620_readb(ctx, REG_TRXINTH);
1972 sii8620_write(ctx, REG_TRXINTH, stat);
1977 u8 stat = sii8620_readb(ctx, REG_EMSCINTR);
1979 if (stat & BIT_EMSCINTR_SPI_DVLD) {
1986 sii8620_write(ctx, REG_EMSCINTR, stat);
1991 u8 stat = sii8620_readb(ctx, REG_INTR3);
1993 if (stat & BIT_DDC_CMD_DONE) {
2001 sii8620_write(ctx, REG_INTR3, stat);