Lines Matching defs:mode
108 struct drm_display_mode mode;
192 return DIV64_U64_ROUND_UP(ps * dsi->mode.clock * bpp,
258 u32 mode;
264 hfront_porch = dsi->mode.hsync_start - dsi->mode.hdisplay;
265 hsync_len = dsi->mode.hsync_end - dsi->mode.hsync_start;
266 hback_porch = dsi->mode.htotal - dsi->mode.hsync_end;
268 vfront_porch = dsi->mode.vsync_start - dsi->mode.vdisplay;
269 vsync_len = dsi->mode.vsync_end - dsi->mode.vsync_start;
270 vback_porch = dsi->mode.vtotal - dsi->mode.vsync_end;
275 DRM_DEV_DEBUG_DRIVER(dsi->dev, "hdisplay = %d\n", dsi->mode.hdisplay);
279 DRM_DEV_DEBUG_DRIVER(dsi->dev, "vactive = %d\n", dsi->mode.vdisplay);
280 DRM_DEV_DEBUG_DRIVER(dsi->dev, "clock = %d kHz\n", dsi->mode.clock);
293 * Adjusting input polarity based on the video mode results in
308 mode = ((dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) ?
311 nwl_dsi_write(dsi, NWL_DSI_VIDEO_MODE, mode);
313 dsi->mode.hdisplay);
325 nwl_dsi_write(dsi, NWL_DSI_PIXEL_PAYLOAD_SIZE, dsi->mode.hdisplay);
326 nwl_dsi_write(dsi, NWL_DSI_VACTIVE, dsi->mode.vdisplay - 1);
550 "Using hs mode workaround for cmd 0x%x\n",
671 DRM_DEV_ERROR(dev, "Failed to set DSI phy mode: %d\n", ret);
776 const struct drm_display_mode *mode,
789 ret = phy_mipi_dphy_get_default_config(mode->clock * 1000,
805 const struct drm_display_mode *mode)
810 if (mode->clock * bpp > 15000000 * dsi->lanes)
813 if (mode->clock * bpp < 80000 * dsi->lanes)
844 const struct drm_display_mode *mode,
862 drm_mode_copy(&dsi->mode, adjusted_mode);