Lines Matching refs:ast
40 struct ast_device *ast = to_ast_device(dev);
43 ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT);
50 struct ast_device *ast = to_ast_device(dev);
52 ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01);
53 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01);
62 struct ast_device *ast = data;
65 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
68 static int ast_enable_mmio(struct ast_device *ast)
70 struct drm_device *dev = &ast->base;
72 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
74 return devm_add_action_or_reset(dev->dev, ast_enable_mmio_release, ast);
77 static void ast_open_key(struct ast_device *ast)
79 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);
82 static int ast_device_config_init(struct ast_device *ast)
84 struct drm_device *dev = &ast->base;
95 ast->config_mode = ast_use_defaults;
100 ast->config_mode = ast_use_dt;
108 jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
109 jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
119 ast_patch_ahb_2500(ast);
123 data = ast_read32(ast, 0xf004);
125 ast->config_mode = ast_use_p2a;
128 ast_write32(ast, 0xf004, 0x1e6e0000);
129 ast_write32(ast, 0xf000, 0x1);
130 scu_rev = ast_read32(ast, 0x1207c);
135 switch (ast->config_mode) {
152 ast->chip = AST2600;
157 ast->chip = AST2510;
161 ast->chip = AST2500;
167 ast->chip = AST1400;
171 ast->chip = AST2400;
177 ast->chip = AST1300;
181 ast->chip = AST2300;
188 ast->chip = AST1100;
192 ast->chip = AST2200;
196 ast->chip = AST2150;
200 ast->chip = AST2100;
205 ast->chip = AST2000;
212 static void ast_detect_widescreen(struct ast_device *ast)
217 switch (AST_GEN(ast)) {
219 ast->support_wide_screen = false;
222 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
224 ast->support_wide_screen = true;
226 ast->support_wide_screen = true;
228 ast->support_wide_screen = false;
229 if (ast->chip == AST1300)
230 ast->support_wide_screen = true;
231 if (ast->chip == AST1400)
232 ast->support_wide_screen = true;
233 if (ast->chip == AST2510)
234 ast->support_wide_screen = true;
235 if (IS_AST_GEN7(ast))
236 ast->support_wide_screen = true;
242 static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
244 struct drm_device *dev = &ast->base;
248 ast->tx_chip_types |= AST_TX_NONE_BIT;
259 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
261 ast->tx_chip_types = AST_TX_SIL164_BIT;
264 if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) {
270 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
273 ast->tx_chip_types = AST_TX_SIL164_BIT;
276 ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL);
277 if (ast->dp501_fw_addr) {
279 if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) {
280 drmm_kfree(dev, ast->dp501_fw_addr);
281 ast->dp501_fw_addr = NULL;
286 ast->tx_chip_types = AST_TX_DP501_BIT;
288 } else if (IS_AST_GEN7(ast)) {
289 if (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK) ==
291 ast->tx_chip_types = AST_TX_ASTDP_BIT;
292 ast_dp_launch(&ast->base);
297 if (ast->tx_chip_types & AST_TX_NONE_BIT)
299 if (ast->tx_chip_types & AST_TX_SIL164_BIT)
301 if (ast->tx_chip_types & AST_TX_DP501_BIT)
303 if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
310 struct ast_device *ast = to_ast_device(dev);
314 switch (ast->config_mode) {
331 ast_write32(ast, 0xf004, 0x1e6e0000);
332 ast_write32(ast, 0xf000, 0x1);
333 mcr_cfg = ast_read32(ast, 0x10004);
334 mcr_scu_mpll = ast_read32(ast, 0x10120);
335 mcr_scu_strap = ast_read32(ast, 0x10170);
339 ast->dram_bus_width = 16;
340 ast->dram_type = AST_DRAM_1Gx16;
341 if (IS_AST_GEN6(ast))
342 ast->mclk = 800;
344 ast->mclk = 396;
349 ast->dram_bus_width = 16;
351 ast->dram_bus_width = 32;
353 if (IS_AST_GEN6(ast)) {
356 ast->dram_type = AST_DRAM_1Gx16;
360 ast->dram_type = AST_DRAM_2Gx16;
363 ast->dram_type = AST_DRAM_4Gx16;
366 ast->dram_type = AST_DRAM_8Gx16;
369 } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast)) {
372 ast->dram_type = AST_DRAM_512Mx16;
376 ast->dram_type = AST_DRAM_1Gx16;
379 ast->dram_type = AST_DRAM_2Gx16;
382 ast->dram_type = AST_DRAM_4Gx16;
389 ast->dram_type = AST_DRAM_512Mx16;
393 ast->dram_type = AST_DRAM_1Gx16;
395 ast->dram_type = AST_DRAM_512Mx32;
398 ast->dram_type = AST_DRAM_1Gx32;
423 ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000));
432 struct ast_device *ast;
436 ast = devm_drm_dev_alloc(&pdev->dev, drv, struct ast_device, base);
437 if (IS_ERR(ast))
438 return ast;
439 dev = &ast->base;
443 ret = drmm_mutex_init(dev, &ast->ioregs_lock);
447 ast->regs = pcim_iomap(pdev, 1, 0);
448 if (!ast->regs)
456 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
459 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
463 if (!ast->ioregs) {
464 ast->ioregs = pcim_iomap(pdev, 2, 0);
465 if (!ast->ioregs)
482 ast_open_key(ast);
483 ret = ast_enable_mmio(ast);
487 ret = ast_device_config_init(ast);
491 ast_detect_widescreen(ast);
492 ast_detect_tx_chip(ast, need_post);
499 ast->mclk, ast->dram_type, ast->dram_bus_width);
504 ret = ast_mm_init(ast);
509 ast->dp501_fw_buf = NULL;
510 if (ast->vram_size < pci_resource_len(pdev, 0)) {
511 ast->dp501_fw_buf = pci_iomap_range(pdev, 0, ast->vram_size, 0);
512 if (!ast->dp501_fw_buf)
516 ret = ast_mode_config_init(ast);
520 return ast;