Lines Matching refs:hdlcd

43 	struct hdlcd_drm_private *hdlcd = arg;
46 irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS);
50 atomic_inc(&hdlcd->buffer_underrun_count);
53 atomic_inc(&hdlcd->dma_end_count);
56 atomic_inc(&hdlcd->bus_error_count);
59 atomic_inc(&hdlcd->vsync_count);
63 drm_crtc_handle_vblank(&hdlcd->crtc);
66 hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);
71 static int hdlcd_irq_install(struct hdlcd_drm_private *hdlcd)
76 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);
77 hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0);
79 ret = request_irq(hdlcd->irq, hdlcd_irq, 0, "hdlcd", hdlcd);
85 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, HDLCD_DEBUG_INT_MASK);
91 static void hdlcd_irq_uninstall(struct hdlcd_drm_private *hdlcd)
94 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);
96 free_irq(hdlcd->irq, hdlcd);
101 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
106 hdlcd->clk = devm_clk_get(drm->dev, "pxlclk");
107 if (IS_ERR(hdlcd->clk))
108 return PTR_ERR(hdlcd->clk);
111 atomic_set(&hdlcd->buffer_underrun_count, 0);
112 atomic_set(&hdlcd->bus_error_count, 0);
113 atomic_set(&hdlcd->vsync_count, 0);
114 atomic_set(&hdlcd->dma_end_count, 0);
117 hdlcd->mmio = devm_platform_ioremap_resource(pdev, 0);
118 if (IS_ERR(hdlcd->mmio)) {
120 ret = PTR_ERR(hdlcd->mmio);
121 hdlcd->mmio = NULL;
125 version = hdlcd_read(hdlcd, HDLCD_REG_VERSION);
152 hdlcd->irq = ret;
154 ret = hdlcd_irq_install(hdlcd);
163 drm_crtc_cleanup(&hdlcd->crtc);
198 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
200 seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count));
201 seq_printf(m, "dma_end : %d\n", atomic_read(&hdlcd->dma_end_count));
202 seq_printf(m, "bus_error: %d\n", atomic_read(&hdlcd->bus_error_count));
203 seq_printf(m, "vsync : %d\n", atomic_read(&hdlcd->vsync_count));
211 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
212 unsigned long clkrate = clk_get_rate(hdlcd->clk);
213 unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000;
232 .name = "hdlcd",
242 struct hdlcd_drm_private *hdlcd;
245 hdlcd = devm_drm_dev_alloc(dev, &hdlcd_driver, typeof(*hdlcd), base);
246 if (IS_ERR(hdlcd))
247 return PTR_ERR(hdlcd);
249 drm = &hdlcd->base;
262 hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);
286 if (hdlcd_read(hdlcd, HDLCD_REG_COMMAND)) {
287 hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
314 of_node_put(hdlcd->crtc.port);
315 hdlcd->crtc.port = NULL;
316 hdlcd_irq_uninstall(hdlcd);
326 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
331 of_node_put(hdlcd->crtc.port);
332 hdlcd->crtc.port = NULL;
335 hdlcd_irq_uninstall(hdlcd);
376 { .compatible = "arm,hdlcd" },
403 .name = "hdlcd",