Lines Matching defs:bank_num

183  * @bank_num:	an output parameter used to return the bank number of the gpio
192 unsigned int *bank_num,
201 *bank_num = bank;
212 *bank_num = 0;
228 unsigned int bank_num, bank_pin_num;
231 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
235 if (bank_num <= 1) {
237 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
240 ZYNQ_GPIO_DATA_OFFSET(bank_num));
243 if (bank_num <= 2) {
245 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
248 ZYNQ_GPIO_DATA_OFFSET(bank_num));
253 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
271 unsigned int reg_offset, bank_num, bank_pin_num;
274 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
279 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num);
281 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num);
308 unsigned int bank_num, bank_pin_num;
312 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
318 if (zynq_gpio_is_zynq(gpio) && bank_num == 0 &&
324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
326 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
348 unsigned int bank_num, bank_pin_num;
352 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
358 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
361 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
363 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
383 unsigned int bank_num, bank_pin_num;
386 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
388 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
406 unsigned int device_pin_num, bank_num, bank_pin_num;
414 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
416 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
430 unsigned int device_pin_num, bank_num, bank_pin_num;
438 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
440 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num));
453 unsigned int device_pin_num, bank_num, bank_pin_num;
458 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
460 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
504 unsigned int device_pin_num, bank_num, bank_pin_num;
509 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
512 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
514 ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
516 ZYNQ_GPIO_INTANY_OFFSET(bank_num));
550 gpio->base_addr + ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
552 gpio->base_addr + ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
554 gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num));
627 unsigned int bank_num,
630 unsigned int bank_offset = gpio->p_data->bank_min[bank_num];
654 unsigned int bank_num;
661 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
663 ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
665 ZYNQ_GPIO_INTMASK_OFFSET(bank_num));
666 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb);
668 bank_num = bank_num + VERSAL_UNUSED_BANKS;
676 unsigned int bank_num;
678 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
679 gpio->context.datalsw[bank_num] =
681 ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num));
682 gpio->context.datamsw[bank_num] =
684 ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num));
685 gpio->context.dirm[bank_num] = readl_relaxed(gpio->base_addr +
686 ZYNQ_GPIO_DIRM_OFFSET(bank_num));
687 gpio->context.int_en[bank_num] = readl_relaxed(gpio->base_addr +
688 ZYNQ_GPIO_INTMASK_OFFSET(bank_num));
689 gpio->context.int_type[bank_num] =
691 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
692 gpio->context.int_polarity[bank_num] =
694 ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
695 gpio->context.int_any[bank_num] =
697 ZYNQ_GPIO_INTANY_OFFSET(bank_num));
699 bank_num = bank_num + VERSAL_UNUSED_BANKS;
705 unsigned int bank_num;
707 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
709 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
710 writel_relaxed(gpio->context.datalsw[bank_num],
712 ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num));
713 writel_relaxed(gpio->context.datamsw[bank_num],
715 ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num));
716 writel_relaxed(gpio->context.dirm[bank_num],
718 ZYNQ_GPIO_DIRM_OFFSET(bank_num));
719 writel_relaxed(gpio->context.int_type[bank_num],
721 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
722 writel_relaxed(gpio->context.int_polarity[bank_num],
724 ZYNQ_GPIO_INTPOL_OFFSET(bank_num));
725 writel_relaxed(gpio->context.int_any[bank_num],
727 ZYNQ_GPIO_INTANY_OFFSET(bank_num));
728 writel_relaxed(~(gpio->context.int_en[bank_num]),
730 ZYNQ_GPIO_INTEN_OFFSET(bank_num));
732 bank_num = bank_num + VERSAL_UNUSED_BANKS;
901 int ret, bank_num;
962 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
964 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
966 bank_num = bank_num + VERSAL_UNUSED_BANKS;