Lines Matching refs:chip
47 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
53 spin_lock_irqsave(&chip->lock, flags);
58 chip->base + IPROC_GPIO_CCA_INT_EVENT);
60 spin_unlock_irqrestore(&chip->lock, flags);
66 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
73 spin_lock_irqsave(&chip->lock, flags);
75 event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
76 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
81 chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
85 chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
87 spin_unlock_irqrestore(&chip->lock, flags);
93 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
99 spin_lock_irqsave(&chip->lock, flags);
101 event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
102 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
107 chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
111 chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
113 spin_unlock_irqrestore(&chip->lock, flags);
120 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
127 spin_lock_irqsave(&chip->lock, flags);
130 event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE);
132 writel_relaxed(event_pol, chip->base + IPROC_GPIO_CCA_INT_EDGE);
135 event_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EDGE);
137 writel_relaxed(event_pol, chip->base + IPROC_GPIO_CCA_INT_EDGE);
140 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
142 writel_relaxed(int_pol, chip->base + IPROC_GPIO_CCA_INT_LEVEL);
145 int_pol = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
147 writel_relaxed(int_pol, chip->base + IPROC_GPIO_CCA_INT_LEVEL);
161 spin_unlock_irqrestore(&chip->lock, flags);
169 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
175 int_status = readl_relaxed(chip->intr + IPROC_CCA_INT_STS);
181 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK);
182 event &= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT);
183 level = readl_relaxed(chip->base + IPROC_GPIO_CCA_DIN);
184 level ^= readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL);
186 readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK);
199 struct iproc_gpio_chip *chip = to_iproc_gpio(gc);
201 seq_printf(p, dev_name(chip->dev));
218 struct iproc_gpio_chip *chip;
222 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
223 if (!chip)
226 chip->dev = dev;
227 platform_set_drvdata(pdev, chip);
228 spin_lock_init(&chip->lock);
230 chip->base = devm_platform_ioremap_resource(pdev, 0);
231 if (IS_ERR(chip->base))
232 return PTR_ERR(chip->base);
234 ret = bgpio_init(&chip->gc, dev, 4,
235 chip->base + IPROC_GPIO_CCA_DIN,
236 chip->base + IPROC_GPIO_CCA_DOUT,
238 chip->base + IPROC_GPIO_CCA_OUT_EN,
242 dev_err(dev, "unable to init GPIO chip\n");
246 chip->gc.label = dev_name(dev);
248 chip->gc.ngpio = num_gpios;
255 chip->intr = devm_platform_ioremap_resource(pdev, 1);
256 if (IS_ERR(chip->intr))
257 return PTR_ERR(chip->intr);
260 val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);
262 writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK);
269 IRQF_SHARED, chip->gc.label, &chip->gc);
275 girq = &chip->gc.irq;
285 ret = devm_gpiochip_add_data(dev, &chip->gc, chip);
287 dev_err(dev, "unable to add GPIO chip\n");
296 struct iproc_gpio_chip *chip = platform_get_drvdata(pdev);
298 if (chip->intr) {
301 val = readl_relaxed(chip->intr + IPROC_CCA_INT_MASK);
303 writel_relaxed(val, chip->intr + IPROC_CCA_INT_MASK);