Lines Matching refs:port
113 static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port,
116 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7);
237 unsigned int port;
246 port = GPIO_PORT(offset);
248 /* There is only one debounce count register per port and hence
251 spin_lock_irqsave(&bank->dbc_lock[port], flags);
252 if (bank->dbc_cnt[port] < debounce_ms) {
254 bank->dbc_cnt[port] = debounce_ms;
256 spin_unlock_irqrestore(&bank->dbc_lock[port], flags);
306 unsigned int gpio = d->hwirq, port = GPIO_PORT(gpio), lvl_type;
341 raw_spin_lock_irqsave(&bank->lvl_lock[port], flags);
348 raw_spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
389 unsigned int port, pin, gpio, i;
406 for (port = 0; port < 4; port++) {
407 gpio = tegra_gpio_compose(bank->bank, port, 0);
544 u32 port, bit, mask;
549 port = GPIO_PORT(gpio);
566 bank->wake_enb[port] |= mask;
568 bank->wake_enb[port] &= ~mask;