Lines Matching refs:gpio_reg
61 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset,
265 void __iomem *grer = gpio_reg(&priv->chip, gpio, GRER);
266 void __iomem *gfer = gpio_reg(&priv->chip, gpio, GFER);
267 void __iomem *gitr = gpio_reg(&priv->chip, gpio, GITR);
268 void __iomem *glpr = gpio_reg(&priv->chip, gpio, GLPR);
324 void __iomem *gwmr = gpio_reg(&priv->chip, gpio, priv->wake_regs.gwmr);
325 void __iomem *gwsr = gpio_reg(&priv->chip, gpio, priv->wake_regs.gwsr);
370 void __iomem *gisr = gpio_reg(&priv->chip, base, GISR);
371 void __iomem *gimr = gpio_reg(&priv->chip, base, GIMR);
395 reg = gpio_reg(&priv->chip, base, GRER);
399 reg = gpio_reg(&priv->chip, base, GFER);
491 ctx->level = readl(gpio_reg(&priv->chip, base, GPLR));
493 ctx->gpdr = readl(gpio_reg(&priv->chip, base, GPDR));
494 ctx->grer = readl(gpio_reg(&priv->chip, base, GRER));
495 ctx->gfer = readl(gpio_reg(&priv->chip, base, GFER));
496 ctx->gimr = readl(gpio_reg(&priv->chip, base, GIMR));
498 ctx->gwmr = readl(gpio_reg(&priv->chip, base, priv->wake_regs.gwmr));
518 writel(ctx->level, gpio_reg(&priv->chip, base, GPSR));
520 writel(ctx->gpdr, gpio_reg(&priv->chip, base, GPDR));
521 writel(ctx->grer, gpio_reg(&priv->chip, base, GRER));
522 writel(ctx->gfer, gpio_reg(&priv->chip, base, GFER));
523 writel(ctx->gimr, gpio_reg(&priv->chip, base, GIMR));
525 writel(ctx->gwmr, gpio_reg(&priv->chip, base, priv->wake_regs.gwmr));