Lines Matching refs:base
364 unsigned long base, gpio;
369 for (base = 0; base < priv->chip.ngpio; base += 32) {
370 void __iomem *gisr = gpio_reg(&priv->chip, base, GISR);
371 void __iomem *gimr = gpio_reg(&priv->chip, base, GIMR);
381 generic_handle_domain_irq(gc->irq.domain, base + gpio);
391 unsigned int base;
393 for (base = 0; base < priv->chip.ngpio; base += 32) {
395 reg = gpio_reg(&priv->chip, base, GRER);
399 reg = gpio_reg(&priv->chip, base, GFER);
450 gpio->chip.base = info->base;
485 unsigned int base;
489 for (base = 0; base < priv->chip.ngpio; base += 32, ctx++) {
491 ctx->level = readl(gpio_reg(&priv->chip, base, GPLR));
493 ctx->gpdr = readl(gpio_reg(&priv->chip, base, GPDR));
494 ctx->grer = readl(gpio_reg(&priv->chip, base, GRER));
495 ctx->gfer = readl(gpio_reg(&priv->chip, base, GFER));
496 ctx->gimr = readl(gpio_reg(&priv->chip, base, GIMR));
498 ctx->gwmr = readl(gpio_reg(&priv->chip, base, priv->wake_regs.gwmr));
512 unsigned int base;
516 for (base = 0; base < priv->chip.ngpio; base += 32, ctx++) {
518 writel(ctx->level, gpio_reg(&priv->chip, base, GPSR));
520 writel(ctx->gpdr, gpio_reg(&priv->chip, base, GPDR));
521 writel(ctx->grer, gpio_reg(&priv->chip, base, GRER));
522 writel(ctx->gfer, gpio_reg(&priv->chip, base, GFER));
523 writel(ctx->gimr, gpio_reg(&priv->chip, base, GIMR));
525 writel(ctx->gwmr, gpio_reg(&priv->chip, base, priv->wake_regs.gwmr));