Lines Matching defs:offset
51 * @offset: the EIC controller's offset address of the PMIC.
59 u32 offset;
65 static void sprd_pmic_eic_update(struct gpio_chip *chip, unsigned int offset,
69 u32 shift = SPRD_PMIC_EIC_BIT(offset);
71 regmap_update_bits(pmic_eic->map, pmic_eic->offset + reg,
75 static int sprd_pmic_eic_read(struct gpio_chip *chip, unsigned int offset,
82 ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);
86 return !!(value & BIT(SPRD_PMIC_EIC_BIT(offset)));
89 static int sprd_pmic_eic_request(struct gpio_chip *chip, unsigned int offset)
91 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_DMSK, 1);
95 static void sprd_pmic_eic_free(struct gpio_chip *chip, unsigned int offset)
97 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_DMSK, 0);
100 static int sprd_pmic_eic_get(struct gpio_chip *chip, unsigned int offset)
102 return sprd_pmic_eic_read(chip, offset, SPRD_PMIC_EIC_DATA);
106 unsigned int offset)
112 static void sprd_pmic_eic_set(struct gpio_chip *chip, unsigned int offset,
119 unsigned int offset,
126 reg = SPRD_PMIC_EIC_CTRL0 + SPRD_PMIC_EIC_BIT(offset) * 0x4;
127 ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);
133 return regmap_write(pmic_eic->map, pmic_eic->offset + reg, value);
136 static int sprd_pmic_eic_set_config(struct gpio_chip *chip, unsigned int offset,
143 return sprd_pmic_eic_set_debounce(chip, offset, arg);
152 u32 offset = irqd_to_hwirq(data);
157 gpiochip_disable_irq(chip, offset);
164 u32 offset = irqd_to_hwirq(data);
166 gpiochip_enable_irq(chip, offset);
213 u32 offset = irqd_to_hwirq(data);
218 state = sprd_pmic_eic_get(chip, offset);
220 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);
222 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);
224 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV,
229 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE,
232 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG,
239 unsigned int irq, unsigned int offset)
247 state = sprd_pmic_eic_get(chip, offset);
250 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);
252 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);
254 post_state = sprd_pmic_eic_get(chip, offset);
262 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE, 1);
264 sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG, 1);
275 ret = regmap_read(pmic_eic->map, pmic_eic->offset + SPRD_PMIC_EIC_MIS,
330 ret = of_property_read_u32(pdev->dev.of_node, "reg", &pmic_eic->offset);